mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-05-07 21:12:32 +02:00
718694d1d6
shortstring temps don't get maximum alignment)
* changed some gettemptyed() calls into gettemp() calls (gettemptyped
means that this temp can only be used for temps of that type,
which is necessary for refcounted types but not for floats)
git-svn-id: trunk@12036 -
232 lines
8.6 KiB
ObjectPascal
232 lines
8.6 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate PowerPC assembler for type converting nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nppccnv;
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{$i fpcdefs.inc}
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interface
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uses
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node,ncnv,ncgcnv,ngppccnv;
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type
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tppctypeconvnode = class(tgenppctypeconvnode)
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protected
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{ procedure second_int_to_int;override; }
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{ procedure second_string_to_string;override; }
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{ procedure second_cstring_to_pchar;override; }
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{ procedure second_string_to_chararray;override; }
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{ procedure second_array_to_pointer;override; }
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function first_int_to_real: tnode; override;
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{ procedure second_pointer_to_array;override; }
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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procedure second_int_to_real;override;
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{ procedure second_real_to_real;override; }
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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{ procedure second_bool_to_int;override; }
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{ procedure second_int_to_bool;override; }
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{ procedure second_set_to_set;override; }
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{ procedure second_ansistring_to_pchar;override; }
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{ procedure second_pchar_to_string;override; }
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{ procedure second_class_to_intf;override; }
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{ procedure second_char_to_char;override; }
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end;
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implementation
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uses
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verbose,globtype,globals,systems,
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symconst,symdef,aasmbase,aasmtai,aasmdata,
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defutil,
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cgbase,cgutils,pass_1,pass_2,
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ncon,ncal,
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ncgutil,procinfo,
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cpubase,aasmcpu,
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rgobj,tgobj,cgobj;
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{*****************************************************************************
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FirstTypeConv
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*****************************************************************************}
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function tppctypeconvnode.first_int_to_real: tnode;
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var
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fname: string[19];
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begin
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{ converting a 64bit integer to a float requires a helper }
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if is_64bitint(left.resultdef) or
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is_currency(left.resultdef) then
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begin
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{ hack to avoid double division by 10000, as it's }
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{ already done by typecheckpass.resultdef_int_to_real }
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if is_currency(left.resultdef) then
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left.resultdef := s64inttype;
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if is_signed(left.resultdef) then
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fname := 'fpc_int64_to_double'
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else
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fname := 'fpc_qword_to_double';
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result := ccallnode.createintern(fname,ccallparanode.create(
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left,nil));
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left:=nil;
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firstpass(result);
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exit;
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end
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else
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{ other integers are supposed to be 32 bit }
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begin
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if is_signed(left.resultdef) then
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inserttypeconv(left,s32inttype)
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else
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inserttypeconv(left,u32inttype);
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firstpass(left);
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end;
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result := nil;
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expectloc:=LOC_FPUREGISTER;
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end;
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{*****************************************************************************
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SecondTypeConv
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*****************************************************************************}
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procedure tppctypeconvnode.second_int_to_real;
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type
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tdummyarray = packed array[0..7] of byte;
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const
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dummy1: int64 = $4330000080000000;
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dummy2: int64 = $4330000000000000;
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var
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tempconst: trealconstnode;
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ref: treference;
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valuereg, tempreg, leftreg, tmpfpureg: tregister;
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size: tcgsize;
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signed : boolean;
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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{ the code here comes from the PowerPC Compiler Writer's Guide }
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{ * longint to double }
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{ addis R0,R0,0x4330 # R0 = 0x43300000 }
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{ stw R0,disp(R1) # store upper half }
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{ xoris R3,R3,0x8000 # flip sign bit }
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{ stw R3,disp+4(R1) # store lower half }
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{ lfd FR1,disp(R1) # float load double of value }
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{ fsub FR1,FR1,FR2 # subtract 0x4330000080000000 }
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{ * cardinal to double }
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{ addis R0,R0,0x4330 # R0 = 0x43300000 }
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{ stw R0,disp(R1) # store upper half }
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{ stw R3,disp+4(R1) # store lower half }
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{ lfd FR1,disp(R1) # float load double of value }
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{ fsub FR1,FR1,FR2 # subtract 0x4330000000000000 }
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tg.Gettemp(current_asmdata.CurrAsmList,8,8,tt_normal,ref);
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signed := is_signed(left.resultdef);
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{ we need a certain constant for the conversion, so create it here }
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if signed then
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tempconst :=
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crealconstnode.create(double(tdummyarray(dummy1)),
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pbestrealtype^)
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else
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tempconst :=
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crealconstnode.create(double(tdummyarray(dummy2)),
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pbestrealtype^);
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typecheckpass(tempconst);
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firstpass(tempconst);
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secondpass(tempconst);
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if (tempconst.location.loc <> LOC_CREFERENCE) or
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{ has to be handled by a helper }
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is_64bitint(left.resultdef) then
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internalerror(200110011);
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if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
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case left.location.loc of
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LOC_REGISTER:
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begin
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leftreg := left.location.register;
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valuereg := leftreg;
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end;
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LOC_CREGISTER:
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begin
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leftreg := left.location.register;
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if signed then
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valuereg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT)
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else
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valuereg := leftreg;
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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leftreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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valuereg := leftreg;
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if signed then
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size := OS_S32
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else
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size := OS_32;
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),
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size,left.location.reference,leftreg);
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end
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else
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internalerror(200110012);
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end;
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tempreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_LIS,tempreg,$4330));
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cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_32,OS_32,tempreg,ref);
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if signed then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_XORIS,valuereg,
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{ xoris expects a unsigned 16 bit int (FK) }
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leftreg,$8000));
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inc(ref.offset,4);
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cg.a_load_reg_ref(current_asmdata.CurrAsmList,OS_32,OS_32,valuereg,ref);
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dec(ref.offset,4);
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tmpfpureg := cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
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cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F64,OS_F64,tempconst.location.reference,
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tmpfpureg);
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tempconst.free;
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location.register := cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
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cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F64,OS_F64,ref,location.register);
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tg.ungetiftemp(current_asmdata.CurrAsmList,ref);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_FSUB,location.register,
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location.register,tmpfpureg));
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{ make sure the precision is correct }
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if (tfloatdef(resultdef).floattype = s32real) then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FRSP,location.register,
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location.register));
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end;
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begin
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ctypeconvnode:=tppctypeconvnode;
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end.
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