mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-05-05 19:32:35 +02:00
718694d1d6
shortstring temps don't get maximum alignment)
* changed some gettemptyed() calls into gettemp() calls (gettemptyped
means that this temp can only be used for temps of that type,
which is necessary for refcounted types but not for floats)
git-svn-id: trunk@12036 -
534 lines
18 KiB
ObjectPascal
534 lines
18 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate x86 inline nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nx86inl;
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{$i fpcdefs.inc}
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interface
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uses
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node,ninl,ncginl;
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type
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tx86inlinenode = class(tcginlinenode)
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{ first pass override
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so that the code generator will actually generate
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these nodes.
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}
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function first_pi: tnode ; override;
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function first_arctan_real: tnode; override;
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function first_abs_real: tnode; override;
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function first_sqr_real: tnode; override;
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function first_sqrt_real: tnode; override;
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function first_ln_real: tnode; override;
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function first_cos_real: tnode; override;
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function first_sin_real: tnode; override;
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function first_round_real: tnode; override;
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function first_trunc_real: tnode; override;
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{ second pass override to generate these nodes }
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procedure second_IncludeExclude;override;
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procedure second_pi; override;
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procedure second_arctan_real; override;
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procedure second_abs_real; override;
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procedure second_round_real; override;
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procedure second_sqr_real; override;
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procedure second_sqrt_real; override;
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procedure second_ln_real; override;
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procedure second_cos_real; override;
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procedure second_sin_real; override;
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procedure second_trunc_real; override;
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procedure second_prefetch;override;
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procedure second_abs_long;override;
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private
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procedure load_fpu_location;
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end;
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implementation
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uses
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systems,
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globtype,globals,
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cutils,verbose,
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symconst,
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defutil,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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symdef,
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cgbase,pass_2,
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cpuinfo,cpubase,paramgr,
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nbas,ncon,ncal,ncnv,nld,ncgutil,
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tgobj,
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cga,cgutils,cgx86,cgobj;
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{*****************************************************************************
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TX86INLINENODE
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*****************************************************************************}
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function tx86inlinenode.first_pi : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_pi := nil;
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end;
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function tx86inlinenode.first_arctan_real : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_arctan_real := nil;
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end;
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function tx86inlinenode.first_abs_real : tnode;
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begin
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if use_sse(resultdef) then
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expectloc:=LOC_MMREGISTER
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else
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expectloc:=LOC_FPUREGISTER;
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first_abs_real := nil;
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end;
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function tx86inlinenode.first_sqr_real : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_sqr_real := nil;
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end;
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function tx86inlinenode.first_sqrt_real : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_sqrt_real := nil;
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end;
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function tx86inlinenode.first_ln_real : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_ln_real := nil;
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end;
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function tx86inlinenode.first_cos_real : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_cos_real := nil;
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end;
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function tx86inlinenode.first_sin_real : tnode;
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begin
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expectloc:=LOC_FPUREGISTER;
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first_sin_real := nil;
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end;
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function tx86inlinenode.first_round_real : tnode;
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begin
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{$ifdef x86_64}
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if use_sse(left.resultdef) then
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expectloc:=LOC_REGISTER
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else
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{$endif x86_64}
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expectloc:=LOC_REFERENCE;
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result:=nil;
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end;
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function tx86inlinenode.first_trunc_real: tnode;
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begin
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if (cs_opt_size in current_settings.optimizerswitches)
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{$ifdef x86_64}
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and not(use_sse(left.resultdef))
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{$endif x86_64}
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then
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result:=inherited
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else
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begin
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{$ifdef x86_64}
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if use_sse(left.resultdef) then
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expectloc:=LOC_REGISTER
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else
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{$endif x86_64}
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expectloc:=LOC_REFERENCE;
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result:=nil;
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end;
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end;
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procedure tx86inlinenode.second_Pi;
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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emit_none(A_FLDPI,S_NO);
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tcgx86(cg).inc_fpu_stack;
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location.register:=NR_FPU_RESULT_REG;
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end;
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{ load the FPU into the an fpu register }
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procedure tx86inlinenode.load_fpu_location;
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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location.register:=NR_FPU_RESULT_REG;
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secondpass(left);
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case left.location.loc of
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LOC_FPUREGISTER:
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;
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LOC_CFPUREGISTER:
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begin
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cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,
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left.location.size,left.location.register,location.register);
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,
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left.location.size,left.location.size,
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left.location.reference,location.register);
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end;
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LOC_MMREGISTER,LOC_CMMREGISTER:
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begin
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location:=left.location;
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location_force_fpureg(current_asmdata.CurrAsmList,location,false);
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end;
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else
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internalerror(309991);
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end;
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end;
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procedure tx86inlinenode.second_arctan_real;
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begin
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load_fpu_location;
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emit_none(A_FLD1,S_NO);
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emit_none(A_FPATAN,S_NO);
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end;
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procedure tx86inlinenode.second_abs_real;
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var
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href : treference;
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begin
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if use_sse(resultdef) then
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begin
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secondpass(left);
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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location:=left.location;
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case tfloatdef(resultdef).floattype of
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s32real:
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reference_reset_symbol(href,current_asmdata.RefAsmSymbol('FPC_ABSMASK_SINGLE'),0);
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s64real:
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reference_reset_symbol(href,current_asmdata.RefAsmSymbol('FPC_ABSMASK_DOUBLE'),0);
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else
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internalerror(200506081);
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPS,S_XMM,href,location.register))
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end
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else
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begin
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load_fpu_location;
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emit_none(A_FABS,S_NO);
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end;
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end;
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procedure tx86inlinenode.second_round_real;
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begin
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{$ifdef x86_64}
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if use_sse(left.resultdef) then
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begin
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secondpass(left);
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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location_reset(location,LOC_REGISTER,OS_S64);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
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case left.location.size of
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OS_F32:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSS2SI,S_Q,left.location.register,location.register));
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OS_F64:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSD2SI,S_Q,left.location.register,location.register));
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else
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internalerror(2007031402);
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end;
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end
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else
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{$endif x86_64}
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begin
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load_fpu_location;
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location_reset(location,LOC_REFERENCE,OS_S64);
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tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
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emit_ref(A_FISTP,S_IQ,location.reference);
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emit_none(A_FWAIT,S_NO);
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end;
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end;
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procedure tx86inlinenode.second_trunc_real;
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var
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oldcw,newcw : treference;
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begin
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{$ifdef x86_64}
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if use_sse(left.resultdef) and
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not((left.location.loc=LOC_FPUREGISTER) and (current_settings.fputype>=fpu_sse3)) then
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begin
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secondpass(left);
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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location_reset(location,LOC_REGISTER,OS_S64);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
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case left.location.size of
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OS_F32:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSS2SI,S_Q,left.location.register,location.register));
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OS_F64:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSD2SI,S_Q,left.location.register,location.register));
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else
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internalerror(2007031401);
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end;
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end
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else
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{$endif x86_64}
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begin
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if (current_settings.fputype>=fpu_sse3) then
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begin
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load_fpu_location;
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location_reset(location,LOC_REFERENCE,OS_S64);
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tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
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emit_ref(A_FISTTP,S_IQ,location.reference);
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end
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else
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begin
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tg.GetTemp(current_asmdata.CurrAsmList,2,2,tt_normal,oldcw);
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tg.GetTemp(current_asmdata.CurrAsmList,2,2,tt_normal,newcw);
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emit_ref(A_FNSTCW,S_NO,newcw);
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emit_ref(A_FNSTCW,S_NO,oldcw);
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emit_const_ref(A_OR,S_W,$0f00,newcw);
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load_fpu_location;
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emit_ref(A_FLDCW,S_NO,newcw);
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location_reset(location,LOC_REFERENCE,OS_S64);
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tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
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emit_ref(A_FISTP,S_IQ,location.reference);
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emit_ref(A_FLDCW,S_NO,oldcw);
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emit_none(A_FWAIT,S_NO);
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tg.UnGetTemp(current_asmdata.CurrAsmList,oldcw);
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tg.UnGetTemp(current_asmdata.CurrAsmList,newcw);
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end;
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end;
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end;
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procedure tx86inlinenode.second_sqr_real;
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begin
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if use_sse(resultdef) then
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begin
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secondpass(left);
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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location:=left.location;
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cg.a_opmm_loc_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,left.location,left.location.register,mms_movescalar);
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end
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else
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begin
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load_fpu_location;
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emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
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end;
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end;
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procedure tx86inlinenode.second_sqrt_real;
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begin
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if use_sse(resultdef) then
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begin
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secondpass(left);
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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location:=left.location;
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case tfloatdef(resultdef).floattype of
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s32real:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,location.register,location.register));
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s64real:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,location.register,location.register));
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else
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internalerror(200510031);
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end;
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end
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else
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begin
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load_fpu_location;
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emit_none(A_FSQRT,S_NO);
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end;
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end;
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procedure tx86inlinenode.second_ln_real;
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begin
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load_fpu_location;
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emit_none(A_FLDLN2,S_NO);
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emit_none(A_FXCH,S_NO);
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emit_none(A_FYL2X,S_NO);
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end;
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procedure tx86inlinenode.second_cos_real;
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begin
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load_fpu_location;
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emit_none(A_FCOS,S_NO);
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end;
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procedure tx86inlinenode.second_sin_real;
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begin
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load_fpu_location;
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emit_none(A_FSIN,S_NO)
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end;
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procedure tx86inlinenode.second_prefetch;
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var
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ref : treference;
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r : tregister;
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begin
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{$ifdef i386}
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if current_settings.cputype>=cpu_Pentium3 then
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{$endif i386}
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begin
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secondpass(left);
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case left.location.loc of
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LOC_CREFERENCE,
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LOC_REFERENCE:
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begin
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r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
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reference_reset_base(ref,r,0);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
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end;
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else
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internalerror(200402021);
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end;
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end;
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end;
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procedure tx86inlinenode.second_abs_long;
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var
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hregister : tregister;
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opsize : tcgsize;
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hp : taicpu;
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begin
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{$ifdef i386}
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if current_settings.cputype<cpu_Pentium2 then
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begin
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opsize:=def_cgsize(left.resultdef);
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secondpass(left);
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location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,false);
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location:=left.location;
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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emit_reg_reg(A_MOV,S_L,left.location.register,location.register);
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emit_const_reg(A_SAR,tcgsize2opsize[opsize],31,left.location.register);
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emit_reg_reg(A_XOR,S_L,left.location.register,location.register);
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emit_reg_reg(A_SUB,S_L,left.location.register,location.register);
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end
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else
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{$endif i386}
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begin
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opsize:=def_cgsize(left.resultdef);
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secondpass(left);
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location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
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hregister:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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location:=left.location;
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hregister);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,location.register);
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emit_reg(A_NEG,tcgsize2opsize[opsize],hregister);
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hp:=taicpu.op_reg_reg(A_CMOVcc,tcgsize2opsize[opsize],hregister,location.register);
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hp.condition:=C_NS;
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current_asmdata.CurrAsmList.concat(hp);
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end;
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end;
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{*****************************************************************************
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INCLUDE/EXCLUDE GENERIC HANDLING
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*****************************************************************************}
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procedure tx86inlinenode.second_IncludeExclude;
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var
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hregister,
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hregister2: tregister;
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setbase : aint;
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bitsperop,l : longint;
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cgop : topcg;
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asmop : tasmop;
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opsize,
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orgsize: tcgsize;
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begin
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if is_smallset(tcallparanode(left).resultdef) then
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opsize:=int_cgsize(tcallparanode(left).resultdef.size)
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else
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opsize:=OS_32;
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bitsperop:=(8*tcgsize2size[opsize]);
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secondpass(tcallparanode(left).left);
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secondpass(tcallparanode(tcallparanode(left).right).left);
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setbase:=tsetdef(tcallparanode(left).left.resultdef).setbase;
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if tcallparanode(tcallparanode(left).right).left.location.loc=LOC_CONSTANT then
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begin
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{ calculate bit position }
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l:=1 shl ((tcallparanode(tcallparanode(left).right).left.location.value-setbase) mod bitsperop);
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{ determine operator }
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if inlinenumber=in_include_x_y then
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cgop:=OP_OR
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else
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begin
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cgop:=OP_AND;
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l:=not(l);
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end;
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case tcallparanode(left).left.location.loc of
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LOC_REFERENCE :
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begin
|
|
inc(tcallparanode(left).left.location.reference.offset,
|
|
((tcallparanode(tcallparanode(left).right).left.location.value-setbase) div bitsperop)*tcgsize2size[opsize]);
|
|
cg.a_op_const_ref(current_asmdata.CurrAsmList,cgop,opsize,l,tcallparanode(left).left.location.reference);
|
|
end;
|
|
LOC_CREGISTER :
|
|
cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
|
|
else
|
|
internalerror(200405022);
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
orgsize:=opsize;
|
|
if opsize in [OS_8,OS_S8] then
|
|
begin
|
|
opsize:=OS_32;
|
|
end;
|
|
{ determine asm operator }
|
|
if inlinenumber=in_include_x_y then
|
|
asmop:=A_BTS
|
|
else
|
|
asmop:=A_BTR;
|
|
|
|
location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,opsize,true);
|
|
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,setbase);
|
|
hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
|
|
if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
|
|
emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
|
|
else
|
|
begin
|
|
{ second argument can't be an 8 bit register either }
|
|
hregister2:=tcallparanode(left).left.location.register;
|
|
if (orgsize in [OS_8,OS_S8]) then
|
|
hregister2:=cg.makeregsize(current_asmdata.CurrAsmList,hregister2,opsize);
|
|
emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,hregister2);
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
end.
|