mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-11-01 00:10:00 +01:00
34c985cfa6
depend on that (and correct a number of cases where this was wrong)
* set the correct subreg type for xmm x86_64 parameter registers
(resolved mantis #14067)
git-svn-id: trunk@13410 -
521 lines
18 KiB
ObjectPascal
521 lines
18 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Contains the base types for the m68k
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{ This Unit contains the base types for the m68k
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}
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unit cpubase;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,
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strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
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{*****************************************************************************
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Assembler Opcodes
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*****************************************************************************}
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type
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{ warning: CPU32 opcodes are not fully compatible with the MC68020. }
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{ 68000 only opcodes }
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tasmop = (a_none,
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a_abcd,a_add,a_adda,a_addi,a_addq,a_addx,a_and,a_andi,
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a_asl,a_asr,a_bcc,a_bcs,a_beq,a_bge,a_bgt,a_bhi,
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a_ble,a_bls,a_blt,a_bmi,a_bne,a_bpl,a_bvc,a_bvs,
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a_bchg,a_bclr,a_bra,a_bset,a_bsr,a_btst,a_chk,
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a_clr,a_cmp,a_cmpa,a_cmpi,a_cmpm,a_dbcc,a_dbcs,a_dbeq,a_dbge,
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a_dbgt,a_dbhi,a_dble,a_dbls,a_dblt,a_dbmi,a_dbne,a_dbra,
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a_dbpl,a_dbt,a_dbvc,a_dbvs,a_dbf,a_divs,a_divu,
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a_eor,a_eori,a_exg,a_illegal,a_ext,a_jmp,a_jsr,
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a_lea,a_link,a_lsl,a_lsr,a_move,a_movea,a_movei,a_moveq,
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a_movem,a_movep,a_muls,a_mulu,a_nbcd,a_neg,a_negx,
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a_nop,a_not,a_or,a_ori,a_pea,a_rol,a_ror,a_roxl,
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a_roxr,a_rtr,a_rts,a_sbcd,a_scc,a_scs,a_seq,a_sge,
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a_sgt,a_shi,a_sle,a_sls,a_slt,a_smi,a_sne,
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a_spl,a_st,a_svc,a_svs,a_sf,a_sub,a_suba,a_subi,a_subq,
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a_subx,a_swap,a_tas,a_trap,a_trapv,a_tst,a_unlk,
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a_rte,a_reset,a_stop,
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{ mc68010 instructions }
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a_bkpt,a_movec,a_moves,a_rtd,
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{ mc68020 instructions }
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a_bfchg,a_bfclr,a_bfexts,a_bfextu,a_bfffo,
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a_bfins,a_bfset,a_bftst,a_callm,a_cas,a_cas2,
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a_chk2,a_cmp2,a_divsl,a_divul,a_extb,a_pack,a_rtm,
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a_trapcc,a_tracs,a_trapeq,a_trapf,a_trapge,a_trapgt,
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a_traphi,a_traple,a_trapls,a_traplt,a_trapmi,a_trapne,
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a_trappl,a_trapt,a_trapvc,a_trapvs,a_unpk,
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{ fpu processor instructions - directly supported only. }
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{ ieee aware and misc. condition codes not supported }
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a_fabs,a_fadd,
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a_fbeq,a_fbne,a_fbngt,a_fbgt,a_fbge,a_fbnge,
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a_fblt,a_fbnlt,a_fble,a_fbgl,a_fbngl,a_fbgle,a_fbngle,
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a_fdbeq,a_fdbne,a_fdbgt,a_fdbngt,a_fdbge,a_fdbnge,
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a_fdblt,a_fdbnlt,a_fdble,a_fdbgl,a_fdbngl,a_fdbgle,a_fdbngle,
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a_fseq,a_fsne,a_fsgt,a_fsngt,a_fsge,a_fsnge,
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a_fslt,a_fsnlt,a_fsle,a_fsgl,a_fsngl,a_fsgle,a_fsngle,
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a_fcmp,a_fdiv,a_fmove,a_fmovem,
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a_fmul,a_fneg,a_fnop,a_fsqrt,a_fsub,a_fsgldiv,
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a_fsflmul,a_ftst,
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a_ftrapeq,a_ftrapne,a_ftrapgt,a_ftrapngt,a_ftrapge,a_ftrapnge,
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a_ftraplt,a_ftrapnlt,a_ftraple,a_ftrapgl,a_ftrapngl,a_ftrapgle,a_ftrapngle,
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{ protected instructions }
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a_cprestore,a_cpsave,
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{ fpu unit protected instructions }
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{ and 68030/68851 common mmu instructions }
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{ (this may include 68040 mmu instructions) }
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a_frestore,a_fsave,a_pflush,a_pflusha,a_pload,a_pmove,a_ptest,
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{ useful for assembly language output }
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a_label,a_dbxx,a_sxx,a_bxx,a_fbxx);
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{# This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[11];
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Const
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{# First value of opcode enumeration }
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firstop = low(tasmop);
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{# Last value of opcode enumeration }
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lastop = high(tasmop);
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{*****************************************************************************
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Registers
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*****************************************************************************}
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type
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{ Number of registers used for indexing in tables }
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tregisterindex=0..{$i r68knor.inc}-1;
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const
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{ Available Superregisters }
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{$i r68ksup.inc}
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{ ? whatever... }
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R_SUBWHOLE = R_SUBNONE;
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{ Available Registers }
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{$i r68kcon.inc}
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{ Integer Super registers first and last }
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first_int_imreg = RS_D7+1;
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{ Float Super register first and last }
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first_fpu_imreg = RS_FP7+1;
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{ Integer Super registers first and last }
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first_addr_imreg = RS_SP+1;
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{ MM Super register first and last }
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first_mm_supreg = 0;
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first_mm_imreg = 0;
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maxfpuregs = 8;
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{ TODO: FIX BSSTART}
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regnumber_count_bsstart = 16;
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regnumber_table : array[tregisterindex] of tregister = (
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{$i r68knum.inc}
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);
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regstabs_table : array[tregisterindex] of shortint = (
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{$i r68ksta.inc}
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);
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regdwarf_table : array[tregisterindex] of shortint = (
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{ TODO: reused stabs values!}
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{$i r68ksta.inc}
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);
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{ registers which may be destroyed by calls }
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VOLATILE_INTREGISTERS = [RS_D0,RS_D1];
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VOLATILE_FPUREGISTERS = [];
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VOLATILE_ADDRESSREGISTER = [RS_A0,RS_A1];
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type
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totherregisterset = set of tregisterindex;
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{*****************************************************************************
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Conditions
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*****************************************************************************}
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type
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TAsmCond=(C_None,
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C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
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C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
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);
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const
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cond2str:array[TAsmCond] of string[3]=('',
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'cc','ls','cs','lt','eq','mi','f','ne',
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'ge','pl','gt','t','hi','vc','le','vs'
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);
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{*****************************************************************************
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Flags
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*****************************************************************************}
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type
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TResFlags = (
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F_E,F_NE,
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F_G,F_L,F_GE,F_LE,F_C,F_NC,F_A,F_AE,F_B,F_BE);
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{*****************************************************************************
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Reference
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*****************************************************************************}
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type
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{ direction of address register : }
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{ (An) (An)+ -(An) }
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tdirection = (dir_none,dir_inc,dir_dec);
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{*****************************************************************************
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Operand Sizes
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*****************************************************************************}
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{ S_NO = No Size of operand }
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{ S_B = 8-bit size operand }
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{ S_W = 16-bit size operand }
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{ S_L = 32-bit size operand }
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{ Floating point types }
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{ S_FS = single type (32 bit) }
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{ S_FD = double/64bit integer }
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{ S_FX = Extended type }
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topsize = (S_NO,S_B,S_W,S_L,S_FS,S_FD,S_FX,S_IQ);
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{*****************************************************************************
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Constants
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*****************************************************************************}
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const
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{# maximum number of operands in assembler instruction }
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max_operands = 4;
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{*****************************************************************************
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Default generic sizes
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*****************************************************************************}
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{# Defines the default address size for a processor, }
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OS_ADDR = OS_32;
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{# the natural int size for a processor, }
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OS_INT = OS_32;
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OS_SINT = OS_S32;
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{# the maximum float size for a processor, }
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OS_FLOAT = OS_F64;
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{# the size of a vector register for a processor }
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OS_VECTOR = OS_M128;
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{*****************************************************************************
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GDB Information
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*****************************************************************************}
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{# Register indexes for stabs information, when some
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parameters or variables are stored in registers.
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Taken from m68kelf.h (DBX_REGISTER_NUMBER)
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from GCC 3.x source code.
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This is not compatible with the m68k-sun
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implementation.
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}
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stab_regindex : array[tregisterindex] of shortint =
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(
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{$i r68ksta.inc}
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);
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{*****************************************************************************
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Generic Register names
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*****************************************************************************}
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{# Stack pointer register }
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NR_STACK_POINTER_REG = NR_SP;
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RS_STACK_POINTER_REG = RS_SP;
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{# Frame pointer register }
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{ TODO: FIX ME!!! frame pointer is A5 on Amiga, but A6 on unixes?}
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NR_FRAME_POINTER_REG = NR_A5;
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RS_FRAME_POINTER_REG = RS_A5;
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{# Register for addressing absolute data in a position independant way,
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such as in PIC code. The exact meaning is ABI specific. For
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further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
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}
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{ TODO: FIX ME!!! pic offset reg conflicts with frame pointer?}
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NR_PIC_OFFSET_REG = NR_A5;
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{ Return address for DWARF }
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{ TODO: just a guess!}
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NR_RETURN_ADDRESS_REG = NR_A0;
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{ Results are returned in this register (32-bit values) }
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NR_FUNCTION_RETURN_REG = NR_D0;
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RS_FUNCTION_RETURN_REG = RS_D0;
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{ Low part of 64bit return value }
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NR_FUNCTION_RETURN64_LOW_REG = NR_D0;
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RS_FUNCTION_RETURN64_LOW_REG = RS_D0;
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{ High part of 64bit return value }
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NR_FUNCTION_RETURN64_HIGH_REG = NR_D1;
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RS_FUNCTION_RETURN64_HIGH_REG = RS_D1;
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{ The value returned from a function is available in this register }
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NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
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RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
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{ The lowh part of 64bit value returned from a function }
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NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
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RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
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{ The high part of 64bit value returned from a function }
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NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
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RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
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{# Floating point results will be placed into this register }
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NR_FPU_RESULT_REG = NR_FP0;
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{*****************************************************************************
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GCC /ABI linking information
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*****************************************************************************}
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{# Registers which must be saved when calling a routine declared as
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cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
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saved should be the ones as defined in the target ABI and / or GCC.
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This value can be deduced from CALLED_USED_REGISTERS array in the
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GCC source.
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}
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saved_standard_registers : array[0..5] of tsuperregister = (RS_D2,RS_D3,RS_D4,RS_D5,RS_D6,RS_D7);
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saved_standard_address_registers : array[0..3] of tsuperregister = (RS_A2,RS_A3,RS_A4,RS_A5);
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{ this is only for the generic code which is not used for this architecture }
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saved_mm_registers : array[0..0] of tsuperregister = (RS_NO);
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{# Required parameter alignment when calling a routine declared as
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stdcall and cdecl. The alignment value should be the one defined
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by GCC or the target ABI.
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The value of this constant is equal to the constant
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PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
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}
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std_param_align = 4; { for 32-bit version only }
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{*****************************************************************************
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CPU Dependent Constants
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*****************************************************************************}
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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function is_calljmp(o:tasmop):boolean;
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procedure inverse_flags(var r : TResFlags);
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function flags_to_cond(const f: TResFlags) : TAsmCond;
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function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
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function reg_cgsize(const reg: tregister): tcgsize;
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function findreg_by_number(r:Tregister):tregisterindex;
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function std_regnum_search(const s:string):Tregister;
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function std_regname(r:Tregister):string;
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function isaddressregister(reg : tregister) : boolean;
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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function dwarf_reg(r:tregister):shortint;
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implementation
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uses
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verbose,
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rgbase;
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const
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std_regname_table : array[tregisterindex] of string[7] = (
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{$i r68kstd.inc}
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);
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i r68krni.inc}
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);
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i r68ksri.inc}
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);
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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function is_calljmp(o:tasmop):boolean;
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begin
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is_calljmp := false;
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if o in [A_BXX,A_FBXX,A_DBXX,A_BCC..A_BVS,A_DBCC..A_DBVS,A_FBEQ..A_FSNGLE,
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A_JSR,A_BSR,A_JMP] then
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is_calljmp := true;
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end;
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procedure inverse_flags(var r: TResFlags);
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const flagsinvers : array[F_E..F_BE] of tresflags =
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(F_NE,F_E,
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F_LE,F_GE,
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F_L,F_G,
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F_NC,F_C,
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F_BE,F_B,
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F_AE,F_A);
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begin
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r:=flagsinvers[r];
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end;
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function flags_to_cond(const f: TResFlags) : TAsmCond;
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const flags2cond: array[tresflags] of tasmcond = (
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C_EQ,{F_E equal}
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C_NE,{F_NE not equal}
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C_GT,{F_G gt signed}
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C_LT,{F_L lt signed}
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C_GE,{F_GE ge signed}
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C_LE,{F_LE le signed}
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C_CS,{F_C carry set}
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C_CC,{F_NC carry clear}
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C_HI,{F_A gt unsigned}
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C_CC,{F_AE ge unsigned}
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C_CS,{F_B lt unsigned}
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C_LS);{F_BE le unsigned}
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begin
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flags_to_cond := flags2cond[f];
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end;
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function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
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var p: pointer;
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begin
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case s of
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OS_NO: begin
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{ TODO: FIX ME!!! results in bad code generation}
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cgsize2subreg:=R_SUBWHOLE;
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end;
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OS_8,OS_S8:
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cgsize2subreg:=R_SUBWHOLE;
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OS_16,OS_S16:
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cgsize2subreg:=R_SUBWHOLE;
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OS_32,OS_S32:
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cgsize2subreg:=R_SUBWHOLE;
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OS_64,OS_S64:
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begin
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// writeln('64bit regsize?');
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cgsize2subreg:=R_SUBWHOLE;
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end;
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OS_F32 :
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cgsize2subreg:=R_SUBFS;
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OS_F64 :
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cgsize2subreg:=R_SUBFD;
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{
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begin
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// is this correct? (KB)
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cgsize2subreg:=R_SUBNONE;
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end;
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}
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else begin
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writeln('M68K: invalid register size');
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// this supposed to be debug
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// p:=nil; dword(p^):=0;
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// internalerror(200301231);
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cgsize2subreg:=R_SUBWHOLE;
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end;
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end;
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end;
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function reg_cgsize(const reg: tregister): tcgsize;
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begin
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case getregtype(reg) of
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R_ADDRESSREGISTER,
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R_INTREGISTER :
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result:=OS_32;
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R_FPUREGISTER :
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result:=OS_F64;
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else
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internalerror(200303181);
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end;
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end;
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function findreg_by_number(r:Tregister):tregisterindex;
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begin
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result:=findreg_by_number_table(r,regnumber_index);
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end;
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function std_regnum_search(const s:string):Tregister;
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begin
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result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
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end;
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function std_regname(r:Tregister):string;
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var
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p : tregisterindex;
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begin
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p:=findreg_by_number_table(r,regnumber_index);
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if p<>0 then
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result:=std_regname_table[p]
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else
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result:=generic_regname(r);
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end;
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function isaddressregister(reg : tregister) : boolean;
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begin
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result:=getregtype(reg)=R_ADDRESSREGISTER;
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end;
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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const
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inverse:array[TAsmCond] of TAsmCond=(C_None,
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{ TODO: TODO, this is just a copy!}
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C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
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C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
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);
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begin
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|
result := inverse[c];
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end;
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function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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begin
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result := c1 = c2;
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end;
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function dwarf_reg(r:tregister):shortint;
|
|
begin
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|
result:=regdwarf_table[findreg_by_number(r)];
|
|
if result=-1 then
|
|
internalerror(200603251);
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|
end;
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|
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end.
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