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bc73f9021c
http://svn.freepascal.org/svn/fpc/branches/avr ........ r5891 | florian | 2007-01-11 17:30:12 +0100 (Do, 11 Jan 2007) | 2 lines + some initial work ........ r10170 | florian | 2008-02-03 11:02:04 +0100 (So, 03 Feb 2008) | 2 lines * continued to work on avr port ........ r10180 | florian | 2008-02-03 15:29:30 +0100 (So, 03 Feb 2008) | 2 lines + a lot of skeleton code for avr added ........ git-svn-id: trunk@10186 -
81 lines
2.1 KiB
ObjectPascal
81 lines
2.1 KiB
ObjectPascal
{
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Copyright (c) 1998-2008 by Florian Klaempfl
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This unit implements the avr specific class for the register
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allocator
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit rgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,aasmtai,aasmdata,aasmcpu,
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cgbase,cgutils,
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cpubase,
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rgobj;
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type
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trgcpu = class(trgobj)
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procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
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procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
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end;
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trgintcpu = class(trgcpu)
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procedure add_cpu_interferences(p : tai);override;
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end;
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implementation
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uses
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verbose, cutils,
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cgobj,
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procinfo;
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procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
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begin
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inherited do_spill_read(list,pos,spilltemp,tempreg);
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end;
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procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
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begin
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inherited do_spill_written(list,pos,spilltemp,tempreg);
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end;
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procedure trgintcpu.add_cpu_interferences(p : tai);
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var
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r : tregister;
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begin
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if p.typ=ait_instruction then
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begin
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case taicpu(p).opcode of
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A_LD:
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;
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end;
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end;
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end;
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end.
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