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1144 lines
28 KiB
ObjectPascal
1144 lines
28 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by the Free Pascal development team
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Basic Processor information for the ARM
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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**********************************************************************}
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Unit CPUInfo;
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Interface
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uses
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globtype;
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Type
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bestreal = double;
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ts32real = single;
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ts64real = double;
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ts80real = type extended;
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ts128real = type extended;
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ts64comp = comp;
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pbestreal=^bestreal;
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{ possible supported processors for this target }
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tcputype =
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(cpu_none,
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cpu_armv3,
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cpu_armv4,
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cpu_armv4t,
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cpu_armv5,
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cpu_armv5t,
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cpu_armv5te,
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cpu_armv5tej,
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cpu_armv6,
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cpu_armv6k,
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cpu_armv6t2,
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cpu_armv6z,
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cpu_armv7,
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cpu_armv7a,
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cpu_armv7r,
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cpu_armv7m,
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cpu_armv7em
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);
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Const
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cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv4t,cpu_armv5];
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cpu_thumb = [];
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cpu_thumb2 = [cpu_armv7m];
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Type
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tfputype =
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(fpu_none,
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fpu_soft,
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fpu_libgcc,
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fpu_fpa,
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fpu_fpa10,
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fpu_fpa11,
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fpu_vfpv2,
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fpu_vfpv3,
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fpu_vfpv3_d16
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);
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tcontrollertype =
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(ct_none,
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{ Phillips }
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ct_lpc2114,
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ct_lpc2124,
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ct_lpc2194,
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ct_lpc1754,
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ct_lpc1756,
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ct_lpc1758,
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ct_lpc1764,
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ct_lpc1766,
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ct_lpc1768,
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{ ATMEL }
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ct_at91sam7s256,
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ct_at91sam7se256,
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ct_at91sam7x256,
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ct_at91sam7xc256,
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{ STMicroelectronics }
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ct_stm32f103rb,
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ct_stm32f103re,
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ct_stm32f103c4t,
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{ TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
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ct_lm3s1110,
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ct_lm3s1133,
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ct_lm3s1138,
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ct_lm3s1150,
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ct_lm3s1162,
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ct_lm3s1165,
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ct_lm3s1166,
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ct_lm3s2110,
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ct_lm3s2139,
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ct_lm3s6100,
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ct_lm3s6110,
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{ TI - Fury Class - 128K Flash, 32K SRAM devices }
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ct_lm3s1601,
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ct_lm3s1608,
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ct_lm3s1620,
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ct_lm3s1635,
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ct_lm3s1636,
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ct_lm3s1637,
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ct_lm3s1651,
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ct_lm3s2601,
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ct_lm3s2608,
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ct_lm3s2620,
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ct_lm3s2637,
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ct_lm3s2651,
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ct_lm3s6610,
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ct_lm3s6611,
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ct_lm3s6618,
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ct_lm3s6633,
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ct_lm3s6637,
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ct_lm3s8630,
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{ TI - Fury Class - 256K Flash, 64K SRAM devices }
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ct_lm3s1911,
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ct_lm3s1918,
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ct_lm3s1937,
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ct_lm3s1958,
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ct_lm3s1960,
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ct_lm3s1968,
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ct_lm3s1969,
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ct_lm3s2911,
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ct_lm3s2918,
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ct_lm3s2919,
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ct_lm3s2939,
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ct_lm3s2948,
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ct_lm3s2950,
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ct_lm3s2965,
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ct_lm3s6911,
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ct_lm3s6918,
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ct_lm3s6938,
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ct_lm3s6950,
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ct_lm3s6952,
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ct_lm3s6965,
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ct_lm3s8930,
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ct_lm3s8933,
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ct_lm3s8938,
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ct_lm3s8962,
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ct_lm3s8970,
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ct_lm3s8971,
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{ TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
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ct_lm3s5951,
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ct_lm3s5956,
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ct_lm3s1b21,
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ct_lm3s2b93,
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ct_lm3s5b91,
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ct_lm3s9b81,
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ct_lm3s9b90,
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ct_lm3s9b92,
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ct_lm3s9b95,
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ct_lm3s9b96,
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{ SAMSUNG }
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ct_sc32442b,
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// generic Thumb2 target
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ct_thumb2bare
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);
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Const
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{# Size of native extended floating point type }
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extended_size = 12;
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{# Size of a multimedia register }
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mmreg_size = 16;
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{ target cpu string (used by compiler options) }
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target_cpu_string = 'arm';
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{ calling conventions supported by the code generator }
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supported_calling_conventions : tproccalloptions = [
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pocall_internproc,
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pocall_safecall,
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pocall_stdcall,
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{ same as stdcall only different name mangling }
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pocall_cdecl,
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{ same as stdcall only different name mangling }
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pocall_cppdecl,
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{ same as stdcall but floating point numbers are handled like equal sized integers }
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pocall_softfloat,
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{ same as stdcall (requires that all const records are passed by
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reference, but that's already done for stdcall) }
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pocall_mwpascal,
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{ used for interrupt handling }
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pocall_interrupt
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];
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cputypestr : array[tcputype] of string[8] = ('',
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'ARMV3',
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'ARMV4',
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'ARMV4T',
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'ARMV5',
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'ARMV5T',
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'ARMV5TE',
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'ARMV5TEJ',
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'ARMV6',
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'ARMV6K',
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'ARMV6T2',
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'ARMV6Z',
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'ARMV7',
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'ARMV7A',
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'ARMV7R',
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'ARMV7M',
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'ARMV7EM'
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);
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fputypestr : array[tfputype] of string[9] = ('',
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'SOFT',
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'LIBGCC',
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'FPA',
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'FPA10',
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'FPA11',
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'VFPV2',
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'VFPV3',
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'VFPV3_D16'
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);
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{ We know that there are fields after sramsize
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but we don't care about this warning }
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{$WARN 3177 OFF}
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embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
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((
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controllertypestr:'';
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controllerunitstr:'';
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interruptvectors:0;
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flashbase:0;
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flashsize:0;
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srambase:0;
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sramsize:0
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),
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(
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controllertypestr:'LPC2114';
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controllerunitstr:'LPC21x4';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$40000000;
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sramsize:$00004000
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),
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(
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controllertypestr:'LPC2124';
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controllerunitstr:'LPC21x4';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$40000000;
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sramsize:$00004000
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),
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(
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controllertypestr:'LPC2194';
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controllerunitstr:'LPC21x4';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$40000000;
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sramsize:$00004000
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),
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(
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controllertypestr:'LPC1754';
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controllerunitstr:'LPC1754';
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interruptvectors:12;
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flashbase:$00000000;
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flashsize:$00020000;
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srambase:$10000000;
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sramsize:$00004000
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),
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(
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controllertypestr:'LPC1756';
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controllerunitstr:'LPC1756';
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interruptvectors:12;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$10000000;
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sramsize:$00004000
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),
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(
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controllertypestr:'LPC1758';
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controllerunitstr:'LPC1758';
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interruptvectors:12;
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flashbase:$00000000;
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flashsize:$00080000;
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srambase:$10000000;
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sramsize:$00008000
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),
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(
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controllertypestr:'LPC1764';
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controllerunitstr:'LPC1764';
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interruptvectors:12;
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flashbase:$00000000;
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flashsize:$00020000;
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srambase:$10000000;
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sramsize:$00004000
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),
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(
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controllertypestr:'LPC1766';
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controllerunitstr:'LPC1766';
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interruptvectors:12;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$10000000;
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sramsize:$00008000
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),
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(
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controllertypestr:'LPC1768';
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controllerunitstr:'LPC1768';
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interruptvectors:12;
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flashbase:$00000000;
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flashsize:$00080000;
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srambase:$10000000;
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sramsize:$00008000
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),
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(
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controllertypestr:'AT91SAM7S256';
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controllerunitstr:'AT91SAM7x256';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$00200000;
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sramsize:$00010000
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),
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(
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controllertypestr:'AT91SAM7SE256';
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controllerunitstr:'AT91SAM7x256';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$00200000;
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sramsize:$00010000
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),
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(
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controllertypestr:'AT91SAM7X256';
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controllerunitstr:'AT91SAM7x256';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$00200000;
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sramsize:$00010000
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),
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(
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controllertypestr:'AT91SAM7XC256';
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controllerunitstr:'AT91SAM7x256';
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interruptvectors:8;
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flashbase:$00000000;
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flashsize:$00040000;
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srambase:$00200000;
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sramsize:$00010000
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),
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// ct_stm32f103rb,
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(
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controllertypestr:'STM32F103RB';
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controllerunitstr:'STM32F103';
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interruptvectors:12;
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flashbase:$08000000;
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flashsize:$00020000;
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srambase:$20000000;
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sramsize:$00005000
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),
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// ct_stm32f103re,
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(
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controllertypestr:'STM32F103RE';
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controllerunitstr:'STM32F103';
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interruptvectors:12;
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flashbase:$08000000;
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flashsize:$00080000;
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srambase:$20000000;
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sramsize:$00010000
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),
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// ct_stm32f103re,
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(
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controllertypestr:'STM32F103C4T';
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controllerunitstr:'STM32F103';
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interruptvectors:12;
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flashbase:$08000000;
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flashsize:$00004000;
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srambase:$20000000;
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sramsize:$00001800
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),
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{ TI - 64 K Flash, 16 K SRAM Devices }
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// ct_lm3s1110,
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(
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controllertypestr:'LM3S1110';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s1133,
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(
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controllertypestr:'LM3S1133';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s1138,
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(
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controllertypestr:'LM3S1138';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s1150,
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(
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controllertypestr:'LM3S1150';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s1162,
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(
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controllertypestr:'LM3S1162';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s1165,
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(
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controllertypestr:'LM3S1165';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s1166,
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(
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controllertypestr:'LM3S1166';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s2110,
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(
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controllertypestr:'LM3S2110';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s2139,
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(
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controllertypestr:'LM3S2139';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s6100,
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(
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controllertypestr:'LM3S6100';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
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// ct_lm3s6110,
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(
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controllertypestr:'LM3S6110';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00010000;
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srambase:$20000000;
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sramsize:$00004000
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),
|
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{ TI - 128K Flash, 32K SRAM devices }
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// ct_lm3s1601,
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(
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controllertypestr:'LM3S1601';
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controllerunitstr:'LM3FURY';
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interruptvectors:72;
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flashbase:$00000000;
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flashsize:$00020000;
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srambase:$20000000;
|
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sramsize:$00008000
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),
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// ct_lm3s1608,
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(
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controllertypestr:'LM3S1608';
|
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controllerunitstr:'LM3FURY';
|
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interruptvectors:72;
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flashbase:$00000000;
|
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flashsize:$00020000;
|
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srambase:$20000000;
|
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sramsize:$00008000
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),
|
|
// ct_lm3s1620,
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|
(
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controllertypestr:'LM3S1620';
|
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controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
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flashbase:$00000000;
|
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flashsize:$00020000;
|
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srambase:$20000000;
|
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sramsize:$00008000
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),
|
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// ct_lm3s1635,
|
|
(
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controllertypestr:'LM3S1635';
|
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controllerunitstr:'LM3FURY';
|
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interruptvectors:72;
|
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flashbase:$00000000;
|
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flashsize:$00020000;
|
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srambase:$20000000;
|
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sramsize:$00008000
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),
|
|
// ct_lm3s1636,
|
|
(
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controllertypestr:'LM3S1636';
|
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controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
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srambase:$20000000;
|
|
sramsize:$00008000
|
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),
|
|
// ct_lm3s1637,
|
|
(
|
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controllertypestr:'LM3S1637';
|
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controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
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flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
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),
|
|
// ct_lm3s1651,
|
|
(
|
|
controllertypestr:'LM3S1651';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s2601,
|
|
(
|
|
controllertypestr:'LM3S2601';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s2608,
|
|
(
|
|
controllertypestr:'LM3S2608';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s2620,
|
|
(
|
|
controllertypestr:'LM3S2620';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s2637,
|
|
(
|
|
controllertypestr:'LM3S2637';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s2651,
|
|
(
|
|
controllertypestr:'LM3S2651';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s6610,
|
|
(
|
|
controllertypestr:'LM3S6610';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s6611,
|
|
(
|
|
controllertypestr:'LM3S6611';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s6618,
|
|
(
|
|
controllertypestr:'LM3S6618';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s6633,
|
|
(
|
|
controllertypestr:'LM3S6633';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s6637,
|
|
(
|
|
controllertypestr:'LM3S6637';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
// ct_lm3s8630,
|
|
(
|
|
controllertypestr:'LM3S8630';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00020000;
|
|
srambase:$20000000;
|
|
sramsize:$00008000
|
|
),
|
|
|
|
{ TI - 256K Flash, 64K SRAM devices }
|
|
// ct_lm3s1911,
|
|
(
|
|
controllertypestr:'LM3S1911';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1918,
|
|
(
|
|
controllertypestr:'LM3S1918';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1937,
|
|
(
|
|
controllertypestr:'LM3S1937';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1958,
|
|
(
|
|
controllertypestr:'LM3S1958';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1960,
|
|
(
|
|
controllertypestr:'LM3S1960';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1968,
|
|
(
|
|
controllertypestr:'LM3S1968';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1969,
|
|
(
|
|
controllertypestr:'LM3S1969';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2911,
|
|
(
|
|
controllertypestr:'LM3S2911';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2918,
|
|
(
|
|
controllertypestr:'LM3S2918';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2919,
|
|
(
|
|
controllertypestr:'LM3S2919';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2939,
|
|
(
|
|
controllertypestr:'LM3S2939';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2948,
|
|
(
|
|
controllertypestr:'LM3S2948';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2950,
|
|
(
|
|
controllertypestr:'LM3S2950';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2965,
|
|
(
|
|
controllertypestr:'LM3S2965';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s6911,
|
|
(
|
|
controllertypestr:'LM3S6911';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s6918,
|
|
(
|
|
controllertypestr:'LM3S6918';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s6938,
|
|
(
|
|
controllertypestr:'LM3S6938';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s6950,
|
|
(
|
|
controllertypestr:'LM3S6950';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s6952,
|
|
(
|
|
controllertypestr:'LM3S6952';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s6965,
|
|
(
|
|
controllertypestr:'LM3S6965';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s8930,
|
|
(
|
|
controllertypestr:'LM3S8930';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s8933,
|
|
(
|
|
controllertypestr:'LM3S8933';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s8938,
|
|
(
|
|
controllertypestr:'LM3S8938';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s8962,
|
|
(
|
|
controllertypestr:'LM3S8962';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s8970,
|
|
(
|
|
controllertypestr:'LM3S8970';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s8971,
|
|
(
|
|
controllertypestr:'LM3S8971';
|
|
controllerunitstr:'LM3FURY';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
|
|
{ TI - Tempest parts - 256 K Flash, 64 K SRAM }
|
|
// ct_lm3s5951,
|
|
(
|
|
controllertypestr:'LM3S5951';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s5956,
|
|
(
|
|
controllertypestr:'LM3S5956';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s1b21,
|
|
(
|
|
controllertypestr:'LM3S1B21';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s2b93,
|
|
(
|
|
controllertypestr:'LM3S2B93';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s5b91,
|
|
(
|
|
controllertypestr:'LM3S5B91';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s9b81,
|
|
(
|
|
controllertypestr:'LM3S9B81';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s9b90,
|
|
(
|
|
controllertypestr:'LM3S9B90';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s9b92,
|
|
(
|
|
controllertypestr:'LM3S9B92';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s9b95,
|
|
(
|
|
controllertypestr:'LM3S9B95';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
// ct_lm3s9b96,
|
|
(
|
|
controllertypestr:'LM3S9B96';
|
|
controllerunitstr:'LM3TEMPEST';
|
|
interruptvectors:72;
|
|
flashbase:$00000000;
|
|
flashsize:$00040000;
|
|
srambase:$20000000;
|
|
sramsize:$00010000
|
|
),
|
|
|
|
//ct_SC32442b,
|
|
(
|
|
controllertypestr:'SC32442B';
|
|
controllerunitstr:'sc32442b';
|
|
interruptvectors:7;
|
|
flashbase:$00000000;
|
|
flashsize:$00000000;
|
|
srambase:$00000000;
|
|
sramsize:$08000000
|
|
),
|
|
|
|
// bare bones Thumb2
|
|
(
|
|
controllertypestr:'THUMB2_BARE';
|
|
controllerunitstr:'THUMB2_BARE';
|
|
interruptvectors:128;
|
|
flashbase:$00000000;
|
|
flashsize:$00100000;
|
|
srambase:$20000000;
|
|
sramsize:$00100000
|
|
)
|
|
);
|
|
|
|
vfp_scalar = [fpu_vfpv2,fpu_vfpv3,fpu_vfpv3_d16];
|
|
|
|
{ Supported optimizations, only used for information }
|
|
supported_optimizerswitches = genericlevel1optimizerswitches+
|
|
genericlevel2optimizerswitches+
|
|
genericlevel3optimizerswitches-
|
|
{ no need to write info about those }
|
|
[cs_opt_level1,cs_opt_level2,cs_opt_level3]+
|
|
[cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
|
|
cs_opt_stackframe,cs_opt_nodecse,cs_opt_reorder_fields,cs_opt_fastmath];
|
|
|
|
level1optimizerswitches = genericlevel1optimizerswitches;
|
|
level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
|
|
[cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse {,cs_opt_scheduler}];
|
|
level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
|
|
level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
|
|
|
|
type
|
|
tcpuflags =
|
|
(CPUARM_HAS_BX,
|
|
CPUARM_HAS_BLX,
|
|
CPUARM_HAS_EDSP,
|
|
CPUARM_HAS_REV,
|
|
CPUARM_HAS_LDREX,
|
|
CPUARM_HAS_IDIV
|
|
);
|
|
|
|
const
|
|
cpu_capabilities : array[tcputype] of set of tcpuflags =
|
|
( { cpu_none } [],
|
|
{ cpu_armv3 } [],
|
|
{ cpu_armv4 } [],
|
|
{ cpu_armv4t } [CPUARM_HAS_BX],
|
|
{ cpu_armv5 } [CPUARM_HAS_BX,CPUARM_HAS_BLX],
|
|
{ cpu_armv5t } [CPUARM_HAS_BX,CPUARM_HAS_BLX],
|
|
{ cpu_armv5te } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP],
|
|
{ cpu_armv5tej } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP],
|
|
{ cpu_armv6 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
|
|
{ cpu_armv6k } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
|
|
{ cpu_armv6t2 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
|
|
{ cpu_armv6z } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
|
|
{ the identifier armv7 is should not be used, it is considered being equal to armv7a }
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{ cpu_armv7 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
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{ cpu_armv7a } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
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{ cpu_armv7r } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
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{ cpu_armv7m } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX,CPUARM_HAS_IDIV],
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{ cpu_armv7em } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX,CPUARM_HAS_IDIV]
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);
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Implementation
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end.
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