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https://gitlab.com/freepascal.org/fpc/source.git
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1015 lines
40 KiB
ObjectPascal
1015 lines
40 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate i386 assembler for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit n386mat;
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{$i fpcdefs.inc}
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interface
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uses
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node,nmat;
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type
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ti386moddivnode = class(tmoddivnode)
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procedure pass_2;override;
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end;
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ti386shlshrnode = class(tshlshrnode)
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procedure pass_2;override;
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{ everything will be handled in pass_2 }
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function first_shlshr64bitint: tnode; override;
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end;
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ti386unaryminusnode = class(tunaryminusnode)
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function pass_1 : tnode;override;
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procedure pass_2;override;
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end;
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ti386notnode = class(tnotnode)
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procedure pass_2;override;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,aasmbase,aasmtai,aasmcpu,defutil,
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cginfo,cgbase,pass_1,pass_2,
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ncon,
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cpubase,cpuinfo,
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cga,tgobj,ncgutil,cgobj,rgobj,rgcpu;
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{*****************************************************************************
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TI386MODDIVNODE
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*****************************************************************************}
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procedure ti386moddivnode.pass_2;
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var
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hreg1 : tregister;
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hreg2 : tregister;
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r,r2 : Tregister;
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shrdiv,popeax,popedx : boolean;
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power : longint;
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hl : tasmlabel;
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pushedregs : tmaybesave;
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begin
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shrdiv := false;
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secondpass(left);
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if codegenerror then
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exit;
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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if codegenerror then
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exit;
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location_copy(location,left.location);
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if is_64bitint(resulttype.def) then
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begin
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{ should be handled in pass_1 (JM) }
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internalerror(200109052);
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end
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else
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begin
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{ put numerator in register }
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location_force_reg(exprasmlist,left.location,OS_INT,false);
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hreg1:=left.location.register;
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if hreg1.enum<>R_INTREGISTER then
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internalerror(200302042);
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if (nodetype=divn) and (right.nodetype=ordconstn) and
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ispowerof2(tordconstnode(right).value,power) then
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begin
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shrdiv := true;
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{ for signed numbers, the numerator must be adjusted before the
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shift instruction, but not wih unsigned numbers! Otherwise,
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"Cardinal($ffffffff) div 16" overflows! (JM) }
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if is_signed(left.resulttype.def) Then
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begin
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if (aktOptProcessor <> class386) and
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not(CS_LittleSize in aktglobalswitches) then
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{ use a sequence without jumps, saw this in
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comp.compilers (JM) }
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begin
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{ no jumps, but more operations }
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if (hreg1.number = NR_EAX) and
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(RS_EDX in rg.unusedregsint) then
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begin
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hreg2 := rg.getexplicitregisterint(exprasmlist,NR_EDX);
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emit_none(A_CDQ,S_NO);
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end
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else
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begin
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rg.getexplicitregisterint(exprasmlist,NR_EDI);
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hreg2.enum := R_INTREGISTER;
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hreg2.number := NR_EDI;
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emit_reg_reg(A_MOV,S_L,hreg1,hreg2);
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{ if the left value is signed, R_EDI := $ffffffff,
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otherwise 0 }
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emit_const_reg(A_SAR,S_L,31,hreg2);
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{ if signed, R_EDI := right value-1, otherwise 0 }
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end;
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emit_const_reg(A_AND,S_L,tordconstnode(right).value-1,hreg2);
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{ add to the left value }
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emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
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{ release EDX if we used it }
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{ also releas EDI }
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rg.ungetregisterint(exprasmlist,hreg2);
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{ do the shift }
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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else
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begin
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{ a jump, but less operations }
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emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
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objectlibrary.getlabel(hl);
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emitjmp(C_NS,hl);
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if power=1 then
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emit_reg(A_INC,S_L,hreg1)
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else
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emit_const_reg(A_ADD,S_L,tordconstnode(right).value-1,hreg1);
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cg.a_label(exprasmlist,hl);
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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end
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else
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emit_const_reg(A_SHR,S_L,power,hreg1);
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end
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else
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begin
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{ bring denominator to EDI }
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{ EDI is always free, it's }
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{ only used for temporary }
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{ purposes }
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rg.getexplicitregisterint(exprasmlist,NR_EDI);
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if right.location.loc<>LOC_CREGISTER then
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location_release(exprasmlist,right.location);
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r.enum:=R_INTREGISTER;
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r.number:=NR_EDI;
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cg.a_load_loc_reg(exprasmlist,right.location,r);
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popedx:=false;
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popeax:=false;
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r.number:=NR_EAX;
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r2.enum:=R_INTREGISTER;
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r2.number:=NR_EDX;
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if hreg1.number=NR_EDX then
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begin
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if not(RS_EAX in rg.unusedregsint) then
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begin
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emit_reg(A_PUSH,S_L,r);
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popeax:=true;
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end
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else
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rg.getexplicitregisterint(exprasmlist,NR_EAX);
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emit_reg_reg(A_MOV,S_L,r2,r);
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end
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else
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begin
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if not(RS_EDX in rg.unusedregsint) then
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begin
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emit_reg(A_PUSH,S_L,r2);
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popedx:=true;
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end
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else
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rg.getexplicitregisterint(exprasmlist,NR_EDX);
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if hreg1.number<>NR_EAX then
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begin
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if not(RS_EAX in rg.unusedregsint) then
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begin
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emit_reg(A_PUSH,S_L,r);
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popeax:=true;
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end
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else
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rg.getexplicitregisterint(exprasmlist,NR_EAX);
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emit_reg_reg(A_MOV,S_L,hreg1,r);
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end;
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end;
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{ sign extension depends on the left type }
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if torddef(left.resulttype.def).typ=u32bit then
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emit_reg_reg(A_XOR,S_L,r2,r2)
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else
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emit_none(A_CDQ,S_NO);
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{ division depends on the right type }
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r.enum:=R_INTREGISTER;
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r.number:=NR_EDI;
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if torddef(right.resulttype.def).typ=u32bit then
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emit_reg(A_DIV,S_L,r)
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else
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emit_reg(A_IDIV,S_L,r);
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rg.ungetregisterint(exprasmlist,r);
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r.enum:=R_INTREGISTER;
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r.number:=NR_EAX;
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if nodetype=divn then
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begin
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if not popedx and (hreg1.number <> NR_EDX) then
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begin
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r2.enum:=R_INTREGISTER;
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r2.number:=NR_EDX;
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rg.ungetregisterint(exprasmlist,r2);
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end;
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{ if result register is busy then copy }
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if popeax then
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begin
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if hreg1.number=NR_EAX then
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internalerror(112);
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emit_reg_reg(A_MOV,S_L,r,hreg1)
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end
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else
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if hreg1.number<>NR_EAX then
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begin
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rg.ungetregisterint(exprasmlist,hreg1);
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{ no need to allocate eax, that's already done before }
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{ the div (JM) }
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hreg1.number:=NR_EAX;
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end;
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end
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else
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begin
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if not popeax and (hreg1.number <> NR_EAX)then
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begin
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r.number:=NR_EAX;
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rg.ungetregisterint(exprasmlist,r);
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end;
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if popedx then
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{the mod was done by an (i)div (so the result is now in
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edx), but edx was occupied prior to the division, so
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move the result into a safe place (JM)}
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emit_reg_reg(A_MOV,S_L,r2,hreg1)
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else
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begin
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if hreg1.number <> NR_EDX then
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rg.ungetregisterint(exprasmlist,hreg1);
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hreg1.number:=NR_EDX
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end;
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end;
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if popeax then
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emit_reg(A_POP,S_L,r);
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if popedx then
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emit_reg(A_POP,S_L,r2);
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end;
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If not(shrdiv) then
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{ shrdiv only use hreg1 (which is already in usedinproc, }
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{ since it was acquired with getregister), the others also }
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{ use both EAX and EDX (JM) }
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begin
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include(rg.usedintinproc,RS_EAX);
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include(rg.usedintinproc,RS_EDX);
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end;
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location_reset(location,LOC_REGISTER,OS_INT);
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location.register:=hreg1;
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end;
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end;
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{*****************************************************************************
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TI386SHLRSHRNODE
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*****************************************************************************}
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function ti386shlshrnode.first_shlshr64bitint: tnode;
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begin
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result := nil;
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end;
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procedure ti386shlshrnode.pass_2;
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var
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hregister2,hregister3,
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hregisterhigh,hregisterlow : tregister;
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popecx : boolean;
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op : tasmop;
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l1,l2,l3 : tasmlabel;
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pushedregs : tmaybesave;
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r,r2:Tregister;
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begin
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popecx:=false;
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secondpass(left);
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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{ determine operator }
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case nodetype of
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shln: op:=A_SHL;
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shrn: op:=A_SHR;
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end;
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if is_64bitint(left.resulttype.def) then
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begin
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location_reset(location,LOC_REGISTER,OS_64);
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{ load left operator in a register }
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location_force_reg(exprasmlist,left.location,OS_64,false);
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hregisterhigh:=left.location.registerhigh;
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hregisterlow:=left.location.registerlow;
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if hregisterhigh.enum<>R_INTREGISTER then
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internalerror(200302056);
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if hregisterlow.enum<>R_INTREGISTER then
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internalerror(200302056);
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{ shifting by a constant directly coded: }
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if (right.nodetype=ordconstn) then
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begin
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{ shrd/shl works only for values <=31 !! }
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if tordconstnode(right).value>31 then
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begin
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if nodetype=shln then
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begin
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emit_reg_reg(A_XOR,S_L,hregisterhigh,
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hregisterhigh);
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if ((tordconstnode(right).value and 31) <> 0) then
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emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
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hregisterlow);
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end
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else
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begin
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emit_reg_reg(A_XOR,S_L,hregisterlow,
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hregisterlow);
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if ((tordconstnode(right).value and 31) <> 0) then
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emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
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hregisterhigh);
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end;
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location.registerhigh:=hregisterlow;
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location.registerlow:=hregisterhigh;
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end
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else
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begin
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if nodetype=shln then
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begin
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emit_const_reg_reg(A_SHLD,S_L,tordconstnode(right).value and 31,
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hregisterlow,hregisterhigh);
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emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
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hregisterlow);
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end
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else
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begin
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emit_const_reg_reg(A_SHRD,S_L,tordconstnode(right).value and 31,
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hregisterhigh,hregisterlow);
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emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
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hregisterhigh);
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end;
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location.registerlow:=hregisterlow;
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location.registerhigh:=hregisterhigh;
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end;
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end
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else
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begin
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{ load right operators in a register }
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if right.location.loc<>LOC_REGISTER then
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begin
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if right.location.loc<>LOC_CREGISTER then
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location_release(exprasmlist,right.location);
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hregister2:=rg.getexplicitregisterint(exprasmlist,NR_ECX);
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cg.a_load_loc_reg(exprasmlist,right.location,hregister2);
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end
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else
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hregister2:=right.location.register;
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{ left operator is already in a register }
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{ hence are both in a register }
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{ is it in the case ECX ? }
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r.enum:=R_INTREGISTER;
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r.number:=NR_ECX;
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r2.enum:=R_INTREGISTER;
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r2.number:=NR_CL;
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if (hregisterlow.number=NR_ECX) then
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begin
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{ then only swap }
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emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
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hregister3:=hregisterlow;
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hregisterlow:=hregister2;
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hregister2:=hregister3;
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end
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else if (hregisterhigh.number=NR_ECX) then
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begin
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{ then only swap }
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emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
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hregister3:=hregisterhigh;
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hregisterhigh:=hregister2;
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hregister2:=hregister3;
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end
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{ if second operator not in ECX ? }
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else if (hregister2.number<>NR_ECX) then
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begin
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{ ECX occupied then push it }
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if not (RS_ECX in rg.unusedregsint) then
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begin
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popecx:=true;
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emit_reg(A_PUSH,S_L,r);
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end
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else
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rg.getexplicitregisterint(exprasmlist,NR_ECX);
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emit_reg_reg(A_MOV,S_L,hregister2,r);
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end;
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if hregister2.number <> NR_ECX then
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rg.ungetregisterint(exprasmlist,hregister2);
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{ the damned shift instructions work only til a count of 32 }
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{ so we've to do some tricks here }
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if nodetype=shln then
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begin
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objectlibrary.getlabel(l1);
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objectlibrary.getlabel(l2);
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objectlibrary.getlabel(l3);
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emit_const_reg(A_CMP,S_L,64,r);
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emitjmp(C_L,l1);
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emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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cg.a_jmp_always(exprasmlist,l3);
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cg.a_label(exprasmlist,l1);
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emit_const_reg(A_CMP,S_L,32,r);
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emitjmp(C_L,l2);
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emit_const_reg(A_SUB,S_L,32,r);
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emit_reg_reg(A_SHL,S_L,r2,
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hregisterlow);
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emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
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emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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cg.a_jmp_always(exprasmlist,l3);
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cg.a_label(exprasmlist,l2);
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emit_reg_reg_reg(A_SHLD,S_L,r2,
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hregisterlow,hregisterhigh);
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emit_reg_reg(A_SHL,S_L,r2,
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hregisterlow);
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cg.a_label(exprasmlist,l3);
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end
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else
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begin
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objectlibrary.getlabel(l1);
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objectlibrary.getlabel(l2);
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objectlibrary.getlabel(l3);
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emit_const_reg(A_CMP,S_L,64,r);
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emitjmp(C_L,l1);
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emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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cg.a_jmp_always(exprasmlist,l3);
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cg.a_label(exprasmlist,l1);
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emit_const_reg(A_CMP,S_L,32,r);
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emitjmp(C_L,l2);
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emit_const_reg(A_SUB,S_L,32,r);
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emit_reg_reg(A_SHR,S_L,r2,
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hregisterhigh);
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emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
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emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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cg.a_jmp_always(exprasmlist,l3);
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cg.a_label(exprasmlist,l2);
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emit_reg_reg_reg(A_SHRD,S_L,r2,
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hregisterhigh,hregisterlow);
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emit_reg_reg(A_SHR,S_L,r2,
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hregisterhigh);
|
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cg.a_label(exprasmlist,l3);
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end;
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|
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{ maybe put ECX back }
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if popecx then
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emit_reg(A_POP,S_L,r)
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else
|
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rg.ungetregisterint(exprasmlist,r);
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|
|
|
location.registerlow:=hregisterlow;
|
|
location.registerhigh:=hregisterhigh;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
{ load left operators in a register }
|
|
location_copy(location,left.location);
|
|
location_force_reg(exprasmlist,location,OS_INT,false);
|
|
|
|
r.enum:=R_INTREGISTER;
|
|
r.number:=NR_ECX;
|
|
r2.enum:=R_INTREGISTER;
|
|
r2.number:=NR_CL;
|
|
|
|
{ shifting by a constant directly coded: }
|
|
if (right.nodetype=ordconstn) then
|
|
begin
|
|
{ l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
|
|
if right.value<=31 then
|
|
}
|
|
emit_const_reg(op,S_L,tordconstnode(right).value and 31,
|
|
location.register);
|
|
{
|
|
else
|
|
emit_reg_reg(A_XOR,S_L,hregister1,
|
|
hregister1);
|
|
}
|
|
end
|
|
else
|
|
begin
|
|
{ load right operators in a register }
|
|
if right.location.loc<>LOC_REGISTER then
|
|
begin
|
|
if right.location.loc<>LOC_CREGISTER then
|
|
location_release(exprasmlist,right.location);
|
|
hregister2:=rg.getexplicitregisterint(exprasmlist,NR_ECX);
|
|
cg.a_load_loc_reg(exprasmlist,right.location,hregister2);
|
|
end
|
|
else
|
|
hregister2:=right.location.register;
|
|
|
|
{ left operator is already in a register }
|
|
{ hence are both in a register }
|
|
{ is it in the case ECX ? }
|
|
if (location.register.number=NR_ECX) then
|
|
begin
|
|
{ then only swap }
|
|
emit_reg_reg(A_XCHG,S_L,location.register,hregister2);
|
|
hregister3:=location.register;
|
|
location.register:=hregister2;
|
|
hregister2:=hregister3;
|
|
end
|
|
{ if second operator not in ECX ? }
|
|
else if (hregister2.number<>NR_ECX) then
|
|
begin
|
|
{ ECX occupied then push it }
|
|
if not (RS_ECX in rg.unusedregsint) then
|
|
begin
|
|
popecx:=true;
|
|
emit_reg(A_PUSH,S_L,r);
|
|
end
|
|
else
|
|
rg.getexplicitregisterint(exprasmlist,NR_ECX);
|
|
emit_reg_reg(A_MOV,S_L,hregister2,r);
|
|
end;
|
|
rg.ungetregisterint(exprasmlist,hregister2);
|
|
{ right operand is in ECX }
|
|
emit_reg_reg(op,S_L,r2,location.register);
|
|
{ maybe ECX back }
|
|
if popecx then
|
|
emit_reg(A_POP,S_L,r)
|
|
else
|
|
rg.ungetregisterint(exprasmlist,r);
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
TI386UNARYMINUSNODE
|
|
*****************************************************************************}
|
|
|
|
function ti386unaryminusnode.pass_1 : tnode;
|
|
begin
|
|
result:=nil;
|
|
firstpass(left);
|
|
if codegenerror then
|
|
exit;
|
|
|
|
registers32:=left.registers32;
|
|
registersfpu:=left.registersfpu;
|
|
{$ifdef SUPPORT_MMX}
|
|
registersmmx:=left.registersmmx;
|
|
{$endif SUPPORT_MMX}
|
|
|
|
if (left.resulttype.def.deftype=floatdef) then
|
|
begin
|
|
if (registersfpu < 1) then
|
|
registersfpu := 1;
|
|
location.loc:=LOC_FPUREGISTER;
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and
|
|
is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
if (left.location.loc<>LOC_MMXREGISTER) and
|
|
(registersmmx<1) then
|
|
registersmmx:=1;
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
if (left.location.loc<>LOC_REGISTER) and
|
|
(registers32<2) then
|
|
registers32:=2;
|
|
location.loc:=LOC_REGISTER;
|
|
end
|
|
else if (left.resulttype.def.deftype=orddef) then
|
|
begin
|
|
if (left.location.loc<>LOC_REGISTER) and
|
|
(registers32<1) then
|
|
registers32:=1;
|
|
location.loc:=LOC_REGISTER;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure ti386unaryminusnode.pass_2;
|
|
|
|
var r:Tregister;
|
|
|
|
{$ifdef SUPPORT_MMX}
|
|
procedure do_mmx_neg;
|
|
var
|
|
op : tasmop;
|
|
r: Tregister;
|
|
begin
|
|
location_reset(location,LOC_MMXREGISTER,OS_NO);
|
|
if cs_mmx_saturation in aktlocalswitches then
|
|
case mmx_type(resulttype.def) of
|
|
mmxs8bit:
|
|
op:=A_PSUBSB;
|
|
mmxu8bit:
|
|
op:=A_PSUBUSB;
|
|
mmxs16bit,mmxfixed16:
|
|
op:=A_PSUBSW;
|
|
mmxu16bit:
|
|
op:=A_PSUBUSW;
|
|
end
|
|
else
|
|
case mmx_type(resulttype.def) of
|
|
mmxs8bit,mmxu8bit:
|
|
op:=A_PSUBB;
|
|
mmxs16bit,mmxu16bit,mmxfixed16:
|
|
op:=A_PSUBW;
|
|
mmxs32bit,mmxu32bit:
|
|
op:=A_PSUBD;
|
|
end;
|
|
r.enum:=R_MM7;
|
|
emit_reg_reg(op,S_NO,location.register,r);
|
|
emit_reg_reg(A_MOVQ,S_NO,r,location.register);
|
|
end;
|
|
{$endif}
|
|
|
|
begin
|
|
if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
secondpass(left);
|
|
|
|
{ load left operator in a register }
|
|
location_copy(location,left.location);
|
|
location_force_reg(exprasmlist,location,OS_64,false);
|
|
|
|
emit_reg(A_NOT,S_L,location.registerhigh);
|
|
emit_reg(A_NEG,S_L,location.registerlow);
|
|
emit_const_reg(A_SBB,S_L,-1,location.registerhigh);
|
|
end
|
|
else
|
|
begin
|
|
secondpass(left);
|
|
location_reset(location,LOC_REGISTER,OS_INT);
|
|
case left.location.loc of
|
|
LOC_REGISTER:
|
|
begin
|
|
location.register:=left.location.register;
|
|
emit_reg(A_NEG,S_L,location.register);
|
|
end;
|
|
LOC_CREGISTER:
|
|
begin
|
|
location.register:=rg.getregisterint(exprasmlist,OS_INT);
|
|
emit_reg_reg(A_MOV,S_L,left.location.register,
|
|
location.register);
|
|
emit_reg(A_NEG,S_L,location.register);
|
|
end;
|
|
{$ifdef SUPPORT_MMX}
|
|
LOC_MMXREGISTER:
|
|
begin
|
|
location_copy(location,left.location);
|
|
r.enum:=R_MM7;
|
|
emit_reg_reg(A_PXOR,S_NO,r,r);
|
|
do_mmx_neg;
|
|
end;
|
|
LOC_CMMXREGISTER:
|
|
begin
|
|
location.register:=rg.getregistermm(exprasmlist);
|
|
r.enum:=R_MM7;
|
|
emit_reg_reg(A_PXOR,S_NO,r,r);
|
|
emit_reg_reg(A_MOVQ,S_NO,left.location.register,
|
|
location.register);
|
|
do_mmx_neg;
|
|
end;
|
|
{$endif SUPPORT_MMX}
|
|
LOC_REFERENCE,
|
|
LOC_CREFERENCE:
|
|
begin
|
|
reference_release(exprasmlist,left.location.reference);
|
|
if (left.resulttype.def.deftype=floatdef) then
|
|
begin
|
|
location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
|
|
location.register.enum:=R_ST;
|
|
cg.a_loadfpu_ref_reg(exprasmlist,
|
|
def_cgsize(left.resulttype.def),
|
|
left.location.reference,location.register);
|
|
emit_none(A_FCHS,S_NO);
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
r.enum:=R_MM7;
|
|
location.register:=rg.getregistermm(exprasmlist);
|
|
emit_reg_reg(A_PXOR,S_NO,r,r);
|
|
emit_ref_reg(A_MOVQ,S_NO,left.location.reference,location.register);
|
|
do_mmx_neg;
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else
|
|
begin
|
|
location.register:=rg.getregisterint(exprasmlist,OS_INT);
|
|
emit_ref_reg(A_MOV,S_L,left.location.reference,location.register);
|
|
emit_reg(A_NEG,S_L,location.register);
|
|
end;
|
|
end;
|
|
LOC_FPUREGISTER,LOC_CFPUREGISTER:
|
|
begin
|
|
{ "load st,st" is ignored by the code generator }
|
|
r.enum:=R_ST;
|
|
cg.a_loadfpu_reg_reg(exprasmlist,left.location.register,r);
|
|
location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
|
|
location.register.enum:=R_ST;
|
|
emit_none(A_FCHS,S_NO);
|
|
end;
|
|
else
|
|
internalerror(200203225);
|
|
end;
|
|
end;
|
|
{ Here was a problem... }
|
|
{ Operand to be negated always }
|
|
{ seems to be converted to signed }
|
|
{ 32-bit before doing neg!! }
|
|
{ So this is useless... }
|
|
{ that's not true: -2^31 gives an overflow error if it is negaded (FK) }
|
|
{ emitoverflowcheck(p);}
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
TI386NOTNODE
|
|
*****************************************************************************}
|
|
|
|
procedure ti386notnode.pass_2;
|
|
const
|
|
flagsinvers : array[F_E..F_BE] of tresflags =
|
|
(F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
|
|
F_BE,F_B,F_AE,F_A);
|
|
var
|
|
hl : tasmlabel;
|
|
opsize : topsize;
|
|
r,r2:Tregister;
|
|
begin
|
|
if is_boolean(resulttype.def) then
|
|
begin
|
|
opsize:=def_opsize(resulttype.def);
|
|
{ the second pass could change the location of left }
|
|
{ if it is a register variable, so we've to do }
|
|
{ this before the case statement }
|
|
if left.location.loc<>LOC_JUMP then
|
|
secondpass(left);
|
|
|
|
case left.location.loc of
|
|
LOC_JUMP :
|
|
begin
|
|
location_reset(location,LOC_JUMP,OS_NO);
|
|
hl:=truelabel;
|
|
truelabel:=falselabel;
|
|
falselabel:=hl;
|
|
secondpass(left);
|
|
maketojumpbool(exprasmlist,left,lr_load_regvars);
|
|
hl:=truelabel;
|
|
truelabel:=falselabel;
|
|
falselabel:=hl;
|
|
end;
|
|
LOC_FLAGS :
|
|
begin
|
|
location_release(exprasmlist,left.location);
|
|
location_reset(location,LOC_FLAGS,OS_NO);
|
|
location.resflags:=flagsinvers[left.location.resflags];
|
|
end;
|
|
LOC_CONSTANT,
|
|
LOC_REGISTER,
|
|
LOC_CREGISTER,
|
|
LOC_REFERENCE,
|
|
LOC_CREFERENCE :
|
|
begin
|
|
location_force_reg(exprasmlist,left.location,def_cgsize(resulttype.def),true);
|
|
emit_reg_reg(A_TEST,opsize,left.location.register,left.location.register);
|
|
location_release(exprasmlist,left.location);
|
|
location_reset(location,LOC_FLAGS,OS_NO);
|
|
location.resflags:=F_E;
|
|
end;
|
|
else
|
|
internalerror(200203224);
|
|
end;
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else
|
|
if (cs_mmx in aktlocalswitches) and is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
secondpass(left);
|
|
location_reset(location,LOC_MMXREGISTER,OS_NO);
|
|
{ prepare EDI }
|
|
r.enum:=R_INTREGISTER;
|
|
r.number:=NR_EDI;
|
|
r2.enum:=R_MM7;
|
|
rg.getexplicitregisterint(exprasmlist,NR_EDI);
|
|
emit_const_reg(A_MOV,S_L,longint($ffffffff),r);
|
|
{ load operand }
|
|
case left.location.loc of
|
|
LOC_MMXREGISTER:
|
|
location_copy(location,left.location);
|
|
LOC_CMMXREGISTER:
|
|
begin
|
|
location.register:=rg.getregistermm(exprasmlist);
|
|
emit_reg_reg(A_MOVQ,S_NO,left.location.register,location.register);
|
|
end;
|
|
LOC_REFERENCE,
|
|
LOC_CREFERENCE:
|
|
begin
|
|
location_release(exprasmlist,left.location);
|
|
location.register:=rg.getregistermm(exprasmlist);
|
|
emit_ref_reg(A_MOVQ,S_NO,left.location.reference,location.register);
|
|
end;
|
|
end;
|
|
{ load mask }
|
|
emit_reg_reg(A_MOVD,S_NO,r,r2);
|
|
rg.ungetregisterint(exprasmlist,r);
|
|
{ lower 32 bit }
|
|
emit_reg_reg(A_PXOR,S_D,r2,location.register);
|
|
{ shift mask }
|
|
emit_const_reg(A_PSLLQ,S_NO,32,r2);
|
|
{ higher 32 bit }
|
|
emit_reg_reg(A_PXOR,S_D,r2,location.register);
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
secondpass(left);
|
|
location_copy(location,left.location);
|
|
location_force_reg(exprasmlist,location,OS_64,false);
|
|
|
|
emit_reg(A_NOT,S_L,location.registerlow);
|
|
emit_reg(A_NOT,S_L,location.registerhigh);
|
|
end
|
|
else
|
|
begin
|
|
secondpass(left);
|
|
location_copy(location,left.location);
|
|
location_force_reg(exprasmlist,location,def_cgsize(resulttype.def),false);
|
|
|
|
opsize:=def_opsize(resulttype.def);
|
|
emit_reg(A_NOT,opsize,location.register);
|
|
end;
|
|
end;
|
|
|
|
|
|
begin
|
|
cmoddivnode:=ti386moddivnode;
|
|
cshlshrnode:=ti386shlshrnode;
|
|
cunaryminusnode:=ti386unaryminusnode;
|
|
cnotnode:=ti386notnode;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.45 2003-02-19 22:00:15 daniel
|
|
* Code generator converted to new register notation
|
|
- Horribily outdated todo.txt removed
|
|
|
|
Revision 1.44 2003/01/13 18:37:44 daniel
|
|
* Work on register conversion
|
|
|
|
Revision 1.43 2003/01/13 14:54:34 daniel
|
|
* Further work to convert codegenerator register convention;
|
|
internalerror bug fixed.
|
|
|
|
Revision 1.42 2003/01/08 18:43:57 daniel
|
|
* Tregister changed into a record
|
|
|
|
Revision 1.41 2002/11/25 17:43:26 peter
|
|
* splitted defbase in defutil,symutil,defcmp
|
|
* merged isconvertable and is_equal into compare_defs(_ext)
|
|
* made operator search faster by walking the list only once
|
|
|
|
Revision 1.40 2002/09/07 15:25:10 peter
|
|
* old logs removed and tabs fixed
|
|
|
|
Revision 1.39 2002/08/15 15:15:55 carl
|
|
* jmpbuf size allocation for exceptions is now cpu specific (as it should)
|
|
* more generic nodes for maths
|
|
* several fixes for better m68k support
|
|
|
|
Revision 1.38 2002/08/14 19:18:16 carl
|
|
* bugfix of unaryminus node with left LOC_CREGISTER
|
|
|
|
Revision 1.37 2002/08/12 15:08:42 carl
|
|
+ stab register indexes for powerpc (moved from gdb to cpubase)
|
|
+ tprocessor enumeration moved to cpuinfo
|
|
+ linker in target_info is now a class
|
|
* many many updates for m68k (will soon start to compile)
|
|
- removed some ifdef or correct them for correct cpu
|
|
|
|
Revision 1.36 2002/08/11 14:32:30 peter
|
|
* renamed current_library to objectlibrary
|
|
|
|
Revision 1.35 2002/08/11 13:24:17 peter
|
|
* saving of asmsymbols in ppu supported
|
|
* asmsymbollist global is removed and moved into a new class
|
|
tasmlibrarydata that will hold the info of a .a file which
|
|
corresponds with a single module. Added librarydata to tmodule
|
|
to keep the library info stored for the module. In the future the
|
|
objectfiles will also be stored to the tasmlibrarydata class
|
|
* all getlabel/newasmsymbol and friends are moved to the new class
|
|
|
|
Revision 1.34 2002/08/02 07:44:31 jonas
|
|
* made assigned() handling generic
|
|
* add nodes now can also evaluate constant expressions at compile time
|
|
that contain nil nodes
|
|
|
|
Revision 1.33 2002/07/20 11:58:02 florian
|
|
* types.pas renamed to defbase.pas because D6 contains a types
|
|
unit so this would conflicts if D6 programms are compiled
|
|
+ Willamette/SSE2 instructions to assembler added
|
|
|
|
Revision 1.32 2002/07/01 18:46:33 peter
|
|
* internal linker
|
|
* reorganized aasm layer
|
|
|
|
Revision 1.31 2002/05/18 13:34:25 peter
|
|
* readded missing revisions
|
|
|
|
Revision 1.30 2002/05/16 19:46:51 carl
|
|
+ defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
|
|
+ try to fix temp allocation (still in ifdef)
|
|
+ generic constructor calls
|
|
+ start of tassembler / tmodulebase class cleanup
|
|
|
|
Revision 1.28 2002/05/13 19:54:38 peter
|
|
* removed n386ld and n386util units
|
|
* maybe_save/maybe_restore added instead of the old maybe_push
|
|
|
|
Revision 1.27 2002/05/12 16:53:17 peter
|
|
* moved entry and exitcode to ncgutil and cgobj
|
|
* foreach gets extra argument for passing local data to the
|
|
iterator function
|
|
* -CR checks also class typecasts at runtime by changing them
|
|
into as
|
|
* fixed compiler to cycle with the -CR option
|
|
* fixed stabs with elf writer, finally the global variables can
|
|
be watched
|
|
* removed a lot of routines from cga unit and replaced them by
|
|
calls to cgobj
|
|
* u32bit-s32bit updates for and,or,xor nodes. When one element is
|
|
u32bit then the other is typecasted also to u32bit without giving
|
|
a rangecheck warning/error.
|
|
* fixed pascal calling method with reversing also the high tree in
|
|
the parast, detected by tcalcst3 test
|
|
|
|
Revision 1.26 2002/04/04 19:06:12 peter
|
|
* removed unused units
|
|
* use tlocation.size in cg.a_*loc*() routines
|
|
|
|
Revision 1.25 2002/04/02 17:11:36 peter
|
|
* tlocation,treference update
|
|
* LOC_CONSTANT added for better constant handling
|
|
* secondadd splitted in multiple routines
|
|
* location_force_reg added for loading a location to a register
|
|
of a specified size
|
|
* secondassignment parses now first the right and then the left node
|
|
(this is compatible with Kylix). This saves a lot of push/pop especially
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with string operations
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* adapted some routines to use the new cg methods
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Revision 1.24 2002/03/31 20:26:39 jonas
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+ a_loadfpu_* and a_loadmm_* methods in tcg
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* register allocation is now handled by a class and is mostly processor
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independent (+rgobj.pas and i386/rgcpu.pas)
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* temp allocation is now handled by a class (+tgobj.pas, -i386\tgcpu.pas)
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* some small improvements and fixes to the optimizer
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* some register allocation fixes
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* some fpuvaroffset fixes in the unary minus node
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* push/popusedregisters is now called rg.save/restoreusedregisters and
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(for i386) uses temps instead of push/pop's when using -Op3 (that code is
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also better optimizable)
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* fixed and optimized register saving/restoring for new/dispose nodes
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* LOC_FPU locations now also require their "register" field to be set to
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R_ST, not R_ST0 (the latter is used for LOC_CFPUREGISTER locations only)
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- list field removed of the tnode class because it's not used currently
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and can cause hard-to-find bugs
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Revision 1.23 2002/03/04 19:10:14 peter
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* removed compiler warnings
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}
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