sergei 89c9cdf6c4 + MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue. ... git-svn-id: trunk@24970 -		2013-06-25 08:15:17 +00:00
..
aasmcpu.pas	* MIPS: MULT[U] and DIV[U] don't modify first operand.	2013-02-16 06:43:41 +00:00
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	+ MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.	2013-06-25 08:15:17 +00:00
cpubase.pas	* MIPS: fixed cgsize2subreg to return correct result for float registers.	2013-06-13 23:50:20 +00:00
cpuelf.pas	+ MIPS linker: support linking PIC object files with non-PIC ones, by routing absolute calls into PIC code through stubs that load R25.	2013-03-31 19:58:52 +00:00
cpugas.pas	* MIPS: 3-operand forms of DIV and DIVU are not macros if first operand is $zero.	2013-06-20 13:14:38 +00:00
cpuinfo.pas	* MIPS: fixed passing CPU type specified with -CpXXX switch to assembler	2013-05-30 15:02:40 +00:00
cpunode.pas
cpupara.pas	+ MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.	2013-06-25 08:15:17 +00:00
cpupi.pas	+ MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.	2013-06-25 08:15:17 +00:00
cputarg.pas	+ ELF linker back-ends for ARM and MIPS.	2013-01-13 18:05:19 +00:00
hlcgcpu.pas	MIPS: reworked PIC/call code:	2013-03-05 19:31:20 +00:00
itcpugas.pas
mipsreg.dat
ncpuadd.pas	* MIPS improvements:	2013-05-29 17:35:56 +00:00
ncpucall.pas
ncpucnv.pas	* MIPS: pi_needs_got is necessary when doing unsigned to float conversions (it uses a global constant) and also if procedure does any calls in PIC mode.	2013-06-08 23:29:50 +00:00
ncpuinln.pas
ncpuld.pas	- Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels.	2013-06-02 10:49:17 +00:00
ncpumat.pas	+ MIPS: initial target-specific unary minus node.	2013-05-04 07:19:08 +00:00
ncpuset.pas	* MIPS case node: simplified code a bit.	2013-06-15 12:36:21 +00:00
opcode.inc	+ Added mips32r2 opcodes needed for pic32.	2013-06-03 20:01:30 +00:00
racpugas.pas	+ Added mips32r2 opcodes needed for pic32.	2013-06-03 20:01:30 +00:00
rgcpu.pas	+ MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at.	2013-06-15 04:04:08 +00:00
rmipscon.inc
rmipsdwf.inc
rmipsgas.inc
rmipsgri.inc
rmipsgss.inc
rmipsnor.inc
rmipsnum.inc
rmipsrni.inc
rmipssri.inc
rmipssta.inc
rmipsstd.inc
rmipssup.inc
strinst.inc	+ Added mips32r2 opcodes needed for pic32.	2013-06-03 20:01:30 +00:00