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https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-11-04 07:59:34 +01:00
840 lines
28 KiB
ObjectPascal
840 lines
28 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by the FPC development team
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Code generation for add nodes (generic version)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,cpubase;
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type
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tcgaddnode = class(taddnode)
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{ function pass_1: tnode; override;}
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procedure pass_2;override;
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protected
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{ call secondpass for both left and right }
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procedure pass_left_right;
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{ set the register of the result location }
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procedure set_result_location_reg;
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{ load left and right nodes into registers }
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procedure force_reg_left_right(allow_swap,allow_constant:boolean);
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{ free used registers, except result location }
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procedure release_reg_left_right;
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procedure second_opfloat;
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procedure second_opboolean;
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procedure second_opsmallset;
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procedure second_op64bit;
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procedure second_opordinal;
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procedure second_addfloat;virtual;abstract;
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procedure second_addboolean;virtual;
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procedure second_addsmallset;virtual;
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procedure second_add64bit;virtual;
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procedure second_addordinal;virtual;
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procedure second_cmpfloat;virtual;abstract;
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procedure second_cmpboolean;virtual;
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procedure second_cmpsmallset;virtual;abstract;
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procedure second_cmp64bit;virtual;abstract;
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procedure second_cmpordinal;virtual;abstract;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,paramgr,
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aasmbase,aasmtai,aasmcpu,defutil,htypechk,
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cgbase,cpuinfo,pass_1,pass_2,regvars,
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ncon,nset,ncgutil,tgobj,cgobj,
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{$ifdef cpu64bit}
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cg64f64
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{$else cpu64bit}
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cg64f32
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{$endif cpu64bit}
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;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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procedure tcgaddnode.pass_left_right;
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var
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tmpreg : tregister;
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isjump,
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pushedfpu : boolean;
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otl,ofl : tasmlabel;
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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{ in case of constant put it to the left }
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if (left.nodetype=ordconstn) then
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swapleftright;
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isjump:=(left.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,left.location,def_cgsize(resulttype.def),false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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{ are too few registers free? }
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if left.location.loc=LOC_FPUREGISTER then
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pushedfpu:=maybe_pushfpu(exprasmlist,right.registersfpu,left.location)
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else
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pushedfpu:=false;
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isjump:=(right.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(right);
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if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,right.location,def_cgsize(resulttype.def),false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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if pushedfpu then
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begin
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tmpreg := cg.getfpuregister(exprasmlist,left.location.size);
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cg.a_loadfpu_loc_reg(exprasmlist,left.location,tmpreg);
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location_reset(left.location,LOC_FPUREGISTER,left.location.size);
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left.location.register := tmpreg;
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end;
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end;
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procedure tcgaddnode.set_result_location_reg;
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begin
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
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if left.location.loc=LOC_REGISTER then
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begin
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if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
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internalerror(200307041);
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{$ifndef cpu64bit}
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if location.size in [OS_64,OS_S64] then
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begin
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location.registerlow := left.location.registerlow;
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location.registerhigh := left.location.registerhigh;
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end
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else
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{$endif}
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location.register := left.location.register;
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end
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else
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if right.location.loc=LOC_REGISTER then
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begin
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if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
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internalerror(200307042);
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{$ifndef cpu64bit}
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if location.size in [OS_64,OS_S64] then
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begin
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location.registerlow := right.location.registerlow;
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location.registerhigh := right.location.registerhigh;
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end
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else
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{$endif}
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location.register := right.location.register;
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end
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else
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begin
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{$ifndef cpu64bit}
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if location.size in [OS_64,OS_S64] then
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begin
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location.registerlow := cg.getintregister(exprasmlist,OS_INT);
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location.registerhigh := cg.getintregister(exprasmlist,OS_INT);
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end
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else
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{$endif}
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location.register := cg.getintregister(exprasmlist,location.size);
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end;
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end;
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procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
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begin
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if (left.location.loc<>LOC_REGISTER) and
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not(
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allow_constant and
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(left.location.loc=LOC_CONSTANT)
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) then
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location_force_reg(exprasmlist,left.location,left.location.size,false);
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if (right.location.loc<>LOC_REGISTER) and
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not(
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allow_constant and
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(right.location.loc=LOC_CONSTANT) and
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(left.location.loc<>LOC_CONSTANT)
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) then
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location_force_reg(exprasmlist,right.location,right.location.size,false);
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{ Left is always a register, right can be register or constant }
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if left.location.loc<>LOC_REGISTER then
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begin
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{ when it is not allowed to swap we have a constant on
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left, that will give problems }
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if not allow_swap then
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internalerror(200307041);
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swapleftright;
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end;
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end;
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procedure tcgaddnode.release_reg_left_right;
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begin
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if (right.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
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not(
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(location.loc = right.location.loc) and
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(location.register=right.location.register)
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) then
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location_release(exprasmlist,right.location);
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if (left.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
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not(
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(location.loc = left.location.loc) and
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(location.register=left.location.register)
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) then
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location_release(exprasmlist,left.location);
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end;
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{*****************************************************************************
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Smallsets
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*****************************************************************************}
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procedure tcgaddnode.second_opsmallset;
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begin
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{ when a setdef is passed, it has to be a smallset }
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if ((left.resulttype.def.deftype=setdef) and
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(tsetdef(left.resulttype.def).settype<>smallset)) or
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((right.resulttype.def.deftype=setdef) and
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(tsetdef(right.resulttype.def).settype<>smallset)) then
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internalerror(200203301);
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if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
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second_cmpsmallset
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else
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second_addsmallset;
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end;
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procedure tcgaddnode.second_addsmallset;
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var
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cgop : TOpCg;
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tmpreg : tregister;
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opdone : boolean;
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begin
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opdone := false;
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pass_left_right;
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force_reg_left_right(true,true);
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{ setelementn is a special case, it must be on right.
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We need an extra check if left is a register because the
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default case can skip the register loading when the
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setelementn is in a register (PFV) }
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if (nf_swaped in flags) and
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(left.nodetype=setelementn) then
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swapleftright;
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if (right.nodetype=setelementn) and
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(left.location.loc<>LOC_REGISTER) then
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location_force_reg(exprasmlist,left.location,left.location.size,false);
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set_result_location_reg;
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case nodetype of
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addn :
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begin
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{ are we adding set elements ? }
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if right.nodetype=setelementn then
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begin
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{ no range support for smallsets! }
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if assigned(tsetelementnode(right).right) then
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internalerror(43244);
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if (right.location.loc = LOC_CONSTANT) then
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cg.a_op_const_reg_reg(exprasmlist,OP_OR,location.size,
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aword(1 shl aword(right.location.value)),
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left.location.register,location.register)
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else
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begin
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tmpreg := cg.getintregister(exprasmlist,location.size);
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cg.a_load_const_reg(exprasmlist,location.size,1,tmpreg);
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cg.a_op_reg_reg(exprasmlist,OP_SHL,location.size,
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right.location.register,tmpreg);
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if left.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(exprasmlist,OP_OR,location.size,tmpreg,
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left.location.register,location.register)
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else
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cg.a_op_const_reg_reg(exprasmlist,OP_OR,location.size,
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aword(left.location.value),tmpreg,location.register);
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cg.ungetregister(exprasmlist,tmpreg);
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end;
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opdone := true;
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end
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else
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cgop := OP_OR;
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end;
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symdifn :
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cgop:=OP_XOR;
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muln :
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cgop:=OP_AND;
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subn :
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begin
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cgop:=OP_AND;
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if (not(nf_swaped in flags)) then
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if (right.location.loc=LOC_CONSTANT) then
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right.location.value := not(right.location.value)
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else
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opdone := true
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else if (left.location.loc=LOC_CONSTANT) then
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left.location.value := not(left.location.value)
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else
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begin
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swapleftright;
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opdone := true;
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end;
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if opdone then
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begin
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if left.location.loc = LOC_CONSTANT then
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begin
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tmpreg := cg.getintregister(exprasmlist,location.size);
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cg.a_load_const_reg(exprasmlist,location.size,
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aword(left.location.value),tmpreg);
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cg.a_op_reg_reg(exprasmlist,OP_NOT,location.size,right.location.register,right.location.register);
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cg.a_op_reg_reg(exprasmlist,OP_AND,location.size,right.location.register,tmpreg);
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cg.a_load_reg_reg(exprasmlist,OS_INT,location.size,tmpreg,location.register);
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cg.ungetregister(exprasmlist,tmpreg);
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end
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else
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begin
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cg.a_op_reg_reg(exprasmlist,OP_NOT,right.location.size,right.location.register,right.location.register);
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cg.a_op_reg_reg(exprasmlist,OP_AND,left.location.size,right.location.register,left.location.register);
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cg.a_load_reg_reg(exprasmlist,left.location.size,location.size,left.location.register,location.register);
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end;
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end;
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end;
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else
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internalerror(2002072701);
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end;
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if not opdone then
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begin
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// these are all commutative operations
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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if (right.location.loc = LOC_CONSTANT) then
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cg.a_op_const_reg_reg(exprasmlist,cgop,location.size,
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aword(right.location.value),left.location.register,
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location.register)
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else
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cg.a_op_reg_reg_reg(exprasmlist,cgop,location.size,
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right.location.register,left.location.register,
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location.register);
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end;
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release_reg_left_right;
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end;
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{*****************************************************************************
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Boolean
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*****************************************************************************}
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procedure tcgaddnode.second_opboolean;
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begin
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if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
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second_cmpboolean
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else
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second_addboolean;
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end;
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procedure tcgaddnode.second_addboolean;
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var
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cgop : TOpCg;
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otl,ofl : tasmlabel;
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begin
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{ And,Or will only evaluate from left to right only the
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needed nodes unless full boolean evaluation is enabled }
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if (nodetype in [orn,andn]) and
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not(cs_full_boolean_eval in aktlocalswitches) then
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begin
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location_reset(location,LOC_JUMP,OS_NO);
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case nodetype of
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andn :
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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secondpass(left);
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maketojumpbool(exprasmlist,left,lr_load_regvars);
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cg.a_label(exprasmlist,truelabel);
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truelabel:=otl;
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end;
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orn :
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begin
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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secondpass(left);
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maketojumpbool(exprasmlist,left,lr_load_regvars);
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cg.a_label(exprasmlist,falselabel);
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falselabel:=ofl;
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end;
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else
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internalerror(200307044);
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end;
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secondpass(right);
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maketojumpbool(exprasmlist,right,lr_load_regvars);
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end
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else
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begin
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pass_left_right;
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force_reg_left_right(false,true);
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set_result_location_reg;
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case nodetype of
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xorn :
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cgop:=OP_XOR;
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orn :
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cgop:=OP_OR;
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andn :
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cgop:=OP_AND;
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else
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internalerror(200203247);
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end;
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if right.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(exprasmlist,cgop,location.size,
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left.location.register,right.location.register,
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location.register)
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else
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cg.a_op_const_reg_reg(exprasmlist,cgop,location.size,
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aword(right.location.value),left.location.register,
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location.register);
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end;
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release_reg_left_right;
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end;
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{*****************************************************************************
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64-bit
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*****************************************************************************}
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procedure tcgaddnode.second_op64bit;
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begin
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if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
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second_cmp64bit
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else
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second_add64bit;
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end;
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procedure tcgaddnode.second_add64bit;
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var
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op : TOpCG;
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checkoverflow : boolean;
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begin
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pass_left_right;
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force_reg_left_right(false,(cs_check_overflow in aktlocalswitches) and
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(nodetype in [addn,subn]));
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set_result_location_reg;
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{ assume no overflow checking is required }
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checkoverflow := false;
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case nodetype of
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addn :
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begin
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op:=OP_ADD;
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checkoverflow := true;
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end;
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subn :
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begin
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op:=OP_SUB;
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checkoverflow := true;
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end;
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xorn:
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op:=OP_XOR;
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orn:
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op:=OP_OR;
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andn:
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op:=OP_AND;
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muln:
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begin
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{ should be handled in pass_1 (JM) }
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internalerror(200109051);
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end;
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else
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internalerror(2002072705);
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end;
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case nodetype of
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xorn,orn,andn,addn:
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begin
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if (right.location.loc = LOC_CONSTANT) then
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cg64.a_op64_const_reg_reg(exprasmlist,op,right.location.valueqword,
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left.location.register64,location.register64)
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else
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cg64.a_op64_reg_reg_reg(exprasmlist,op,right.location.register64,
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left.location.register64,location.register64);
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end;
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subn:
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begin
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if (nf_swaped in flags) then
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swapleftright;
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if left.location.loc <> LOC_CONSTANT then
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begin
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if right.location.loc <> LOC_CONSTANT then
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// reg64 - reg64
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cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
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right.location.register64,left.location.register64,
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location.register64)
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else
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// reg64 - const64
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|
cg64.a_op64_const_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.valueqword,left.location.register64,
|
|
location.register64)
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
location_force_reg(exprasmlist,left.location,left.location.size,true);
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.register64,left.location.register64,
|
|
location.register64);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072803);
|
|
end;
|
|
|
|
{ emit overflow check if enabled }
|
|
if checkoverflow then
|
|
cg.g_overflowcheck(exprasmlist,Location,ResultType.Def);
|
|
|
|
release_reg_left_right;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Floats
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opfloat;
|
|
begin
|
|
if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
|
|
second_cmpfloat
|
|
else
|
|
second_addfloat;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Ordinals
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opordinal;
|
|
begin
|
|
if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
|
|
second_cmpordinal
|
|
else
|
|
second_addordinal;
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_addordinal;
|
|
var
|
|
unsigned,
|
|
checkoverflow : boolean;
|
|
cgop : topcg;
|
|
tmpreg : tregister;
|
|
begin
|
|
pass_left_right;
|
|
force_reg_left_right(false,(cs_check_overflow in aktlocalswitches) and
|
|
(nodetype in [addn,subn,muln]));
|
|
set_result_location_reg;
|
|
|
|
{ determine if the comparison will be unsigned }
|
|
unsigned:=not(is_signed(left.resulttype.def)) or
|
|
not(is_signed(right.resulttype.def));
|
|
|
|
{ assume no overflow checking is require }
|
|
checkoverflow := false;
|
|
|
|
case nodetype of
|
|
addn:
|
|
begin
|
|
cgop := OP_ADD;
|
|
checkoverflow := true;
|
|
end;
|
|
xorn :
|
|
begin
|
|
cgop := OP_XOR;
|
|
end;
|
|
orn :
|
|
begin
|
|
cgop := OP_OR;
|
|
end;
|
|
andn:
|
|
begin
|
|
cgop := OP_AND;
|
|
end;
|
|
muln:
|
|
begin
|
|
checkoverflow := true;
|
|
if unsigned then
|
|
cgop := OP_MUL
|
|
else
|
|
cgop := OP_IMUL;
|
|
end;
|
|
subn :
|
|
begin
|
|
checkoverflow := true;
|
|
cgop := OP_SUB;
|
|
end;
|
|
end;
|
|
|
|
if nodetype <> subn then
|
|
begin
|
|
if (right.location.loc <> LOC_CONSTANT) then
|
|
cg.a_op_reg_reg_reg(exprasmlist,cgop,location.size,
|
|
left.location.register,right.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,cgop,location.size,
|
|
aword(right.location.value),left.location.register,
|
|
location.register);
|
|
end
|
|
else { subtract is a special case since its not commutative }
|
|
begin
|
|
if (nf_swaped in flags) then
|
|
swapleftright;
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,location.size,
|
|
right.location.register,left.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_SUB,location.size,
|
|
aword(right.location.value),left.location.register,
|
|
location.register);
|
|
end
|
|
else
|
|
begin
|
|
tmpreg := cg.getintregister(exprasmlist,location.size);
|
|
cg.a_load_const_reg(exprasmlist,location.size,
|
|
aword(left.location.value),tmpreg);
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,location.size,
|
|
right.location.register,tmpreg,location.register);
|
|
cg.ungetregister(exprasmlist,tmpreg);
|
|
end;
|
|
end;
|
|
|
|
{ emit overflow check if required }
|
|
if checkoverflow then
|
|
cg.g_overflowcheck(exprasmlist,Location,ResultType.Def);
|
|
|
|
release_reg_left_right;
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_cmpboolean;
|
|
begin
|
|
second_cmpordinal;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
pass_2
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.pass_2;
|
|
begin
|
|
case left.resulttype.def.deftype of
|
|
orddef :
|
|
begin
|
|
{ handling boolean expressions }
|
|
if is_boolean(left.resulttype.def) and
|
|
is_boolean(right.resulttype.def) then
|
|
second_opboolean
|
|
{ 64bit operations }
|
|
else if is_64bit(left.resulttype.def) then
|
|
second_op64bit
|
|
else
|
|
second_opordinal;
|
|
end;
|
|
stringdef :
|
|
begin
|
|
{ this should already be handled in pass1 }
|
|
internalerror(2002072402);
|
|
end;
|
|
setdef :
|
|
begin
|
|
{ normalsets are already handled in pass1 }
|
|
if (tsetdef(left.resulttype.def).settype<>smallset) then
|
|
internalerror(200109041);
|
|
second_opsmallset;
|
|
end;
|
|
arraydef :
|
|
begin
|
|
{$ifdef SUPPORT_MMX}
|
|
if is_mmx_able_array(left.resulttype.def) then
|
|
second_opmmx;
|
|
{$endif SUPPORT_MMX}
|
|
{ only mmx arrays are possible }
|
|
internalerror(200306016);
|
|
end;
|
|
floatdef :
|
|
second_opfloat;
|
|
else
|
|
second_opordinal;
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
caddnode:=tcgaddnode;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.22 2003-10-17 01:22:08 florian
|
|
* compilation of the powerpc compiler fixed
|
|
|
|
Revision 1.21 2003/10/10 17:48:13 peter
|
|
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
|
|
* tregisteralloctor renamed to trgobj
|
|
* removed rgobj from a lot of units
|
|
* moved location_* and reference_* to cgobj
|
|
* first things for mmx register allocation
|
|
|
|
Revision 1.20 2003/10/01 20:34:48 peter
|
|
* procinfo unit contains tprocinfo
|
|
* cginfo renamed to cgbase
|
|
* moved cgmessage to verbose
|
|
* fixed ppc and sparc compiles
|
|
|
|
Revision 1.19 2003/09/14 21:57:08 jonas
|
|
* fixed release_reg_left_right for fpu registers
|
|
|
|
Revision 1.18 2003/09/14 21:34:16 peter
|
|
* fix setelementn support
|
|
* fix loading of flags
|
|
|
|
Revision 1.17 2003/09/03 15:55:00 peter
|
|
* NEWRA branch merged
|
|
|
|
Revision 1.16 2003/09/03 11:18:36 florian
|
|
* fixed arm concatcopy
|
|
+ arm support in the common compiler sources added
|
|
* moved some generic cg code around
|
|
+ tfputype added
|
|
* ...
|
|
|
|
Revision 1.15.2.2 2003/09/01 21:02:55 peter
|
|
* sparc updates for new tregister
|
|
|
|
Revision 1.15.2.1 2003/08/27 20:23:55 peter
|
|
* remove old ra code
|
|
|
|
Revision 1.15 2003/07/08 21:24:59 peter
|
|
* sparc fixes
|
|
|
|
Revision 1.14 2003/07/06 17:44:12 peter
|
|
* cleanup and first sparc implementation
|
|
|
|
Revision 1.13 2003/06/12 16:43:07 peter
|
|
* newra compiles for sparc
|
|
|
|
Revision 1.12 2003/06/10 20:46:17 mazen
|
|
* fixing a general compile problem related to
|
|
cg.g_overflowcheck declaration that has
|
|
changed
|
|
|
|
Revision 1.11 2003/06/01 21:38:06 peter
|
|
* getregisterfpu size parameter added
|
|
* op_const_reg size parameter added
|
|
* sparc updates
|
|
|
|
Revision 1.10 2003/05/23 14:27:35 peter
|
|
* remove some unit dependencies
|
|
* current_procinfo changes to store more info
|
|
|
|
Revision 1.9 2003/04/30 22:15:59 florian
|
|
* some 64 bit adaptions in ncgadd
|
|
* x86-64 now uses ncgadd
|
|
* tparamanager.ret_in_acc doesn't return true anymore for a void-def
|
|
|
|
Revision 1.8 2003/04/23 20:16:04 peter
|
|
+ added currency support based on int64
|
|
+ is_64bit for use in cg units instead of is_64bitint
|
|
* removed cgmessage from n386add, replace with internalerrors
|
|
|
|
Revision 1.7 2003/04/22 23:50:22 peter
|
|
* firstpass uses expectloc
|
|
* checks if there are differences between the expectloc and
|
|
location.loc from secondpass in EXTDEBUG
|
|
|
|
Revision 1.6 2003/02/19 22:00:14 daniel
|
|
* Code generator converted to new register notation
|
|
- Horribily outdated todo.txt removed
|
|
|
|
Revision 1.5 2003/02/02 19:25:54 carl
|
|
* Several bugfixes for m68k target (register alloc., opcode emission)
|
|
+ VIS target
|
|
+ Generic add more complete (still not verified)
|
|
|
|
Revision 1.4 2003/01/08 18:43:56 daniel
|
|
* Tregister changed into a record
|
|
|
|
Revision 1.3 2002/12/14 15:02:03 carl
|
|
* maxoperands -> max_operands (for portability in rautils.pas)
|
|
* fix some range-check errors with loadconst
|
|
+ add ncgadd unit to m68k
|
|
* some bugfix of a_param_reg with LOC_CREFERENCE
|
|
|
|
Revision 1.2 2002/12/08 15:02:17 carl
|
|
+ more fixes
|
|
|
|
Revision 1.1 2002/12/07 19:51:35 carl
|
|
+ first version (uncompilable!)
|
|
|
|
}
|