mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-05-04 01:03:41 +02:00
845 lines
28 KiB
ObjectPascal
845 lines
28 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by the FPC development team
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Code generation for add nodes (generic version)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,cpubase,cginfo;
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type
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tcgaddnode = class(taddnode)
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{ function pass_1: tnode; override;}
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procedure pass_2;override;
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protected
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procedure pass_left_and_right;
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{ load left and right nodes into registers }
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procedure load_left_right(cmpop, load_constants: boolean);
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{ free used registers, except result location }
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procedure clear_left_right(cmpop: boolean);
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procedure second_opfloat;
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procedure second_opboolean;
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procedure second_opsmallset;
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procedure second_op64bit;
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{ procedure second_addfloat;virtual;}
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procedure second_addboolean;virtual;
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procedure second_addsmallset;virtual;
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procedure second_add64bit;virtual;
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procedure second_addordinal;virtual;
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{ procedure second_cmpfloat;virtual;}
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procedure second_cmpboolean;virtual;abstract;
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procedure second_cmpsmallset;virtual;abstract;
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procedure second_cmp64bit;virtual;abstract;
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procedure second_cmpordinal;virtual;abstract;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,paramgr,
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aasmbase,aasmtai,aasmcpu,defutil,htypechk,
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cgbase,cpuinfo,pass_1,pass_2,regvars,
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cpupara,
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ncon,nset,ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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procedure tcgaddnode.pass_left_and_right;
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var
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pushedregs : tmaybesave;
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tmpreg : tregister;
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pushedfpu : boolean;
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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{ in case of constant put it to the left }
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if (left.nodetype=ordconstn) then
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swapleftright;
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secondpass(left);
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{ are too few registers free? }
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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if location.loc=LOC_FPUREGISTER then
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pushedfpu:=maybe_pushfpu(exprasmlist,right.registersfpu,left.location)
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else
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pushedfpu:=false;
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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if pushedfpu then
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begin
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tmpreg := rg.getregisterfpu(exprasmlist);
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cg.a_loadfpu_loc_reg(exprasmlist,left.location,tmpreg);
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location_reset(left.location,LOC_FPUREGISTER,left.location.size);
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left.location.register := tmpreg;
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end;
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end;
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procedure tcgaddnode.load_left_right(cmpop, load_constants: boolean);
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procedure load_node(var n: tnode);
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begin
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case n.location.loc of
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LOC_REGISTER:
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if not cmpop then
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begin
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def) then
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location.registerhigh := n.location.registerhigh;
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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if not cmpop then
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begin
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def) then
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location.registerhigh := n.location.registerhigh;
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end;
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end;
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LOC_CONSTANT:
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begin
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if load_constants then
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begin
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location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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if not cmpop then
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def) then
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location.registerhigh := n.location.registerhigh;
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end;
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end;
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end;
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end;
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begin
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load_node(left);
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load_node(right);
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end;
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procedure tcgaddnode.clear_left_right(cmpop: boolean);
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begin
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if (right.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
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(cmpop or
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(location.register.enum <> right.location.register.enum)) then
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begin
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rg.ungetregister(exprasmlist,right.location.register);
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if is_64bitint(right.resulttype.def) then
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rg.ungetregister(exprasmlist,right.location.registerhigh);
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end;
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if (left.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
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(cmpop or
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(location.register.enum <> left.location.register.enum)) then
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begin
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rg.ungetregister(exprasmlist,left.location.register);
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if is_64bitint(left.resulttype.def) then
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rg.ungetregister(exprasmlist,left.location.registerhigh);
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end;
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end;
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{*****************************************************************************
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Smallsets
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*****************************************************************************}
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procedure tcgaddnode.second_opsmallset;
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var
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cmpop : boolean;
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begin
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cmpop := false;
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pass_left_and_right;
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{ when a setdef is passed, it has to be a smallset }
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if ((left.resulttype.def.deftype=setdef) and
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(tsetdef(left.resulttype.def).settype<>smallset)) or
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((right.resulttype.def.deftype=setdef) and
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(tsetdef(right.resulttype.def).settype<>smallset)) then
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internalerror(200203301);
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if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
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cmpop := true;
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{ load non-constant values (left and right) into registers }
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load_left_right(cmpop,false);
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if cmpop then
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second_cmpsmallset
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else
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second_addsmallset;
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clear_left_right(cmpop);
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end;
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procedure tcgaddnode.second_addsmallset;
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var
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cgop : TOpCg;
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tmpreg : tregister;
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opdone,
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cmpop : boolean;
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size:Tcgsize;
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begin
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opdone := false;
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size:=def_cgsize(resulttype.def);
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location_reset(location,LOC_REGISTER,size);
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if (location.register.enum = R_NO) then
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location.register := rg.getregisterint(exprasmlist,size);
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case nodetype of
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addn :
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begin
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if (nf_swaped in flags) and (left.nodetype=setelementn) then
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swapleftright;
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{ are we adding set elements ? }
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if right.nodetype=setelementn then
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begin
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{ no range support for smallsets! }
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if assigned(tsetelementnode(right).right) then
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internalerror(43244);
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if (right.location.loc = LOC_CONSTANT) then
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cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
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aword(1 shl aword(right.location.value)),
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left.location.register,location.register)
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else
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begin
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tmpreg := cg.get_scratch_reg_int(exprasmlist,size);
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cg.a_load_const_reg(exprasmlist,OS_INT,1,tmpreg);
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cg.a_op_reg_reg(exprasmlist,OP_SHL,OS_INT,
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right.location.register,tmpreg);
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if left.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_INT,tmpreg,
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left.location.register,location.register)
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else
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cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
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aword(left.location.value),tmpreg,location.register);
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cg.free_scratch_reg(exprasmlist,tmpreg);
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end;
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opdone := true;
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end
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else
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cgop := OP_OR;
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end;
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symdifn :
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cgop:=OP_XOR;
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muln :
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cgop:=OP_AND;
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subn :
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begin
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cgop:=OP_AND;
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if (not(nf_swaped in flags)) then
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if (right.location.loc=LOC_CONSTANT) then
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right.location.value := not(right.location.value)
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else
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opdone := true
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else if (left.location.loc=LOC_CONSTANT) then
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left.location.value := not(left.location.value)
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else
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begin
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swapleftright;
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opdone := true;
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end;
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if opdone then
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begin
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if left.location.loc = LOC_CONSTANT then
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begin
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tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
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cg.a_load_const_reg(exprasmlist,OS_INT,
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aword(left.location.value),tmpreg);
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cg.a_op_reg_reg(exprasmlist,OP_NOT,OS_INT,right.location.register,right.location.register);
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cg.a_op_reg_reg(exprasmlist,OP_AND,OS_INT,right.location.register,tmpreg);
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cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,tmpreg,location.register);
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cg.free_scratch_reg(exprasmlist,tmpreg);
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end
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else
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begin
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cg.a_op_reg_reg(exprasmlist,OP_NOT,OS_INT,right.location.register,right.location.register);
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cg.a_op_reg_reg(exprasmlist,OP_AND,OS_INT,right.location.register,left.location.register);
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cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,left.location.register,location.register);
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end;
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end;
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end;
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else
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internalerror(2002072701);
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end;
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if not opdone then
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begin
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// these are all commutative operations
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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if (right.location.loc = LOC_CONSTANT) then
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cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
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aword(right.location.value),left.location.register,
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location.register)
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else
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cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
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right.location.register,left.location.register,
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location.register);
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end;
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end;
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{*****************************************************************************
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Boolean
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*****************************************************************************}
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procedure tcgaddnode.second_opboolean;
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var
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cmpop : boolean;
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begin
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cmpop := false;
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
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if cmpop then
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second_cmpboolean
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else
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second_addboolean;
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end;
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procedure tcgaddnode.second_addboolean;
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var
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cgop : TOpCg;
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cgsize : TCgSize;
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isjump : boolean;
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otl,ofl : tasmlabel;
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pushedregs : tmaybesave;
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begin
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if (torddef(left.resulttype.def).typ=bool8bit) or
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(torddef(right.resulttype.def).typ=bool8bit) then
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cgsize:=OS_8
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else
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if (torddef(left.resulttype.def).typ=bool16bit) or
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(torddef(right.resulttype.def).typ=bool16bit) then
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cgsize:=OS_16
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else
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cgsize:=OS_32;
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if (cs_full_boolean_eval in aktlocalswitches) or
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(nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
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begin
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if left.nodetype in [ordconstn,realconstn] then
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swapleftright;
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isjump:=(left.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,left.location,cgsize,false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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isjump:=(right.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,right.location,cgsize,false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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{ set result location }
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
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load_left_right(false,false);
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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case nodetype of
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xorn :
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cgop:=OP_XOR;
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orn :
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cgop:=OP_OR;
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andn :
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cgop:=OP_AND;
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else
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internalerror(200203247);
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end;
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if right.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
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left.location.register,right.location.register,
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location.register)
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else
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cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
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aword(right.location.value),left.location.register,
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location.register);
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end
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else
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begin
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case nodetype of
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andn,
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orn :
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begin
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location_reset(location,LOC_JUMP,OS_NO);
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case nodetype of
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andn :
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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secondpass(left);
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maketojumpbool(exprasmlist,left,lr_load_regvars);
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cg.a_label(exprasmlist,truelabel);
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truelabel:=otl;
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end;
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orn :
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begin
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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secondpass(left);
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maketojumpbool(exprasmlist,left,lr_load_regvars);
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cg.a_label(exprasmlist,falselabel);
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falselabel:=ofl;
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end;
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else
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CGMessage(type_e_mismatch);
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end;
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secondpass(right);
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maketojumpbool(exprasmlist,right,lr_load_regvars);
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end;
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end;
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end;
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{ free used register (except the result register) }
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clear_left_right(true);
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end;
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{*****************************************************************************
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64-bit
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*****************************************************************************}
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procedure tcgaddnode.second_op64bit;
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var
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cmpop : boolean;
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begin
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cmpop := false;
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firstcomplex(self);
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pass_left_and_right;
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if nodetype in [equaln,unequaln,gtn,gten,ltn,lten] then
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cmpop := true;
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if cmpop then
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second_cmp64bit
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else
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second_add64bit;
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{ free used register (except the result register) }
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clear_left_right(cmpop);
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end;
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|
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procedure tcgaddnode.second_add64bit;
|
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var
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op : TOpCG;
|
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unsigned : boolean;
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checkoverflow : boolean;
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begin
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unsigned:=((left.resulttype.def.deftype=orddef) and
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(torddef(left.resulttype.def).typ=u64bit)) or
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((right.resulttype.def.deftype=orddef) and
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(torddef(right.resulttype.def).typ=u64bit));
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{ assume no overflow checking is required }
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checkoverflow := false;
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case nodetype of
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addn :
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begin
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op:=OP_ADD;
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checkoverflow := true;
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end;
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subn :
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begin
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op:=OP_SUB;
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checkoverflow := true;
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end;
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xorn:
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op:=OP_XOR;
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orn:
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op:=OP_OR;
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andn:
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op:=OP_AND;
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muln:
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begin
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{ should be handled in pass_1 (JM) }
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internalerror(200109051);
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end;
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else
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internalerror(2002072705);
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end;
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
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load_left_right(false,(cs_check_overflow in aktlocalswitches) and
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(nodetype in [addn,subn]));
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case nodetype of
|
|
xorn,orn,andn,addn:
|
|
begin
|
|
if (location.registerlow.enum = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
|
|
location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
|
|
end;
|
|
|
|
if (left.location.loc = LOC_CONSTANT) then
|
|
swapleftright;
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg64.a_op64_const_reg_reg(exprasmlist,op,right.location.valueqword,
|
|
left.location.register64,location.register64)
|
|
else
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,op,right.location.register64,
|
|
left.location.register64,location.register64);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swaped in flags) then
|
|
swapleftright;
|
|
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if (location.registerlow.enum = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
|
|
location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
|
|
end;
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
// reg64 - reg64
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.register64,left.location.register64,
|
|
location.register64)
|
|
else
|
|
// reg64 - const64
|
|
cg64.a_op64_const_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.valueqword,left.location.register64,
|
|
location.register64)
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
location_force_reg(exprasmlist,left.location,
|
|
def_cgsize(left.resulttype.def),true);
|
|
if (left.location.loc = LOC_REGISTER) then
|
|
location.register64 := left.location.register64
|
|
else if (location.registerlow.enum = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
|
|
location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
|
|
end;
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.register64,left.location.register64,
|
|
location.register64);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072803);
|
|
end;
|
|
|
|
{ emit overflow check if enabled }
|
|
if checkoverflow then
|
|
cg.g_overflowcheck(exprasmlist,self);
|
|
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
Floats
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opfloat;
|
|
begin
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
Ordinals
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_addordinal;
|
|
var
|
|
unsigned : boolean;
|
|
checkoverflow : boolean;
|
|
cgop : topcg;
|
|
tmpreg : tregister;
|
|
size:Tcgsize;
|
|
begin
|
|
size:=def_cgsize(resulttype.def);
|
|
{ set result location }
|
|
location_reset(location,LOC_REGISTER,size);
|
|
|
|
{ determine if the comparison will be unsigned }
|
|
unsigned:=not(is_signed(left.resulttype.def)) or
|
|
not(is_signed(right.resulttype.def));
|
|
|
|
{ load values into registers }
|
|
load_left_right(false, (cs_check_overflow in aktlocalswitches) and
|
|
(nodetype in [addn,subn,muln]));
|
|
|
|
if (location.register.enum = R_NO) then
|
|
location.register := rg.getregisterint(exprasmlist,OS_INT);
|
|
|
|
{ assume no overflow checking is require }
|
|
checkoverflow := false;
|
|
|
|
case nodetype of
|
|
addn:
|
|
begin
|
|
cgop := OP_ADD;
|
|
checkoverflow := true;
|
|
end;
|
|
xorn :
|
|
begin
|
|
cgop := OP_XOR;
|
|
end;
|
|
orn :
|
|
begin
|
|
cgop := OP_OR;
|
|
end;
|
|
andn:
|
|
begin
|
|
cgop := OP_AND;
|
|
end;
|
|
muln:
|
|
begin
|
|
checkoverflow := true;
|
|
if unsigned then
|
|
cgop := OP_MUL
|
|
else
|
|
cgop := OP_IMUL;
|
|
end;
|
|
subn :
|
|
begin
|
|
checkoverflow := true;
|
|
cgop := OP_SUB;
|
|
end;
|
|
end;
|
|
|
|
if nodetype <> subn then
|
|
begin
|
|
if (left.location.loc = LOC_CONSTANT) then
|
|
swapleftright;
|
|
if (right.location.loc <> LOC_CONSTANT) then
|
|
cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
|
|
left.location.register,right.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
|
|
aword(right.location.value),left.location.register,
|
|
location.register);
|
|
end
|
|
else { subtract is a special case since its not commutative }
|
|
begin
|
|
if (nf_swaped in flags) then
|
|
swapleftright;
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
right.location.register,left.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
aword(right.location.value),left.location.register,
|
|
location.register);
|
|
end
|
|
else
|
|
begin
|
|
tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
|
|
cg.a_load_const_reg(exprasmlist,OS_INT,
|
|
aword(left.location.value),tmpreg);
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
right.location.register,tmpreg,location.register);
|
|
cg.free_scratch_reg(exprasmlist,tmpreg);
|
|
end;
|
|
end;
|
|
|
|
{ emit overflow check if required }
|
|
if checkoverflow then
|
|
cg.g_overflowcheck(exprasmlist,self);
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
pass_2
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.pass_2;
|
|
{ is also being used for xor, and "mul", "sub, or and comparative }
|
|
{ operators }
|
|
var
|
|
cmpop : boolean;
|
|
cgop : topcg;
|
|
op : tasmop;
|
|
tmpreg : tregister;
|
|
|
|
{ true, if unsigned types are compared }
|
|
unsigned : boolean;
|
|
|
|
regstopush: tregisterset;
|
|
|
|
begin
|
|
{ to make it more readable, string and set (not smallset!) have their
|
|
own procedures }
|
|
case left.resulttype.def.deftype of
|
|
orddef :
|
|
begin
|
|
{ handling boolean expressions }
|
|
if is_boolean(left.resulttype.def) and
|
|
is_boolean(right.resulttype.def) then
|
|
begin
|
|
second_opboolean;
|
|
exit;
|
|
end
|
|
{ 64bit operations }
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
second_op64bit;
|
|
exit;
|
|
end;
|
|
end;
|
|
stringdef :
|
|
begin
|
|
{ this should already be handled in pass1 }
|
|
internalerror(2002072402);
|
|
exit;
|
|
end;
|
|
setdef :
|
|
begin
|
|
{ normalsets are already handled in pass1 }
|
|
if (tsetdef(left.resulttype.def).settype<>smallset) then
|
|
internalerror(200109041);
|
|
second_opsmallset;
|
|
exit;
|
|
end;
|
|
arraydef :
|
|
begin
|
|
{$ifdef SUPPORT_MMX}
|
|
if is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
second_opmmx;
|
|
exit;
|
|
end;
|
|
{$endif SUPPORT_MMX}
|
|
end;
|
|
floatdef :
|
|
begin
|
|
second_opfloat;
|
|
exit;
|
|
end;
|
|
end;
|
|
|
|
{*********************** ordinals / integrals *******************}
|
|
|
|
cmpop:=nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
|
|
|
|
{ normally nothing should be in flags }
|
|
if (left.location.loc = LOC_FLAGS) or
|
|
(right.location.loc = LOC_FLAGS) then
|
|
internalerror(2002072602);
|
|
|
|
|
|
pass_left_and_right;
|
|
|
|
if cmpop then
|
|
second_cmpordinal
|
|
else
|
|
second_addordinal;
|
|
|
|
{ free used register (except the result register) }
|
|
clear_left_right(cmpop);
|
|
end;
|
|
|
|
begin
|
|
caddnode:=tcgaddnode;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.6 2003-02-19 22:00:14 daniel
|
|
* Code generator converted to new register notation
|
|
- Horribily outdated todo.txt removed
|
|
|
|
Revision 1.5 2003/02/02 19:25:54 carl
|
|
* Several bugfixes for m68k target (register alloc., opcode emission)
|
|
+ VIS target
|
|
+ Generic add more complete (still not verified)
|
|
|
|
Revision 1.4 2003/01/08 18:43:56 daniel
|
|
* Tregister changed into a record
|
|
|
|
Revision 1.3 2002/12/14 15:02:03 carl
|
|
* maxoperands -> max_operands (for portability in rautils.pas)
|
|
* fix some range-check errors with loadconst
|
|
+ add ncgadd unit to m68k
|
|
* some bugfix of a_param_reg with LOC_CREFERENCE
|
|
|
|
Revision 1.2 2002/12/08 15:02:17 carl
|
|
+ more fixes
|
|
|
|
Revision 1.1 2002/12/07 19:51:35 carl
|
|
+ first version (uncompilable!)
|
|
|
|
} |