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	o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now
git-svn-id: trunk@34996 -
		
	
			
		
			
				
	
	
		
			100 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
			
		
		
	
	
			100 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
{
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    Copyright (c) 1998-2002,2015 by Florian Klaempfl
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    Generate x86 assembler for in load nodes
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    This program is free software; you can redistribute it and/or modify
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    it under the terms of the GNU General Public License as published by
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    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with this program; if not, write to the Free Software
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    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 ****************************************************************************
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}
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unit nx86ld;
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{$i fpcdefs.inc}
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interface
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    uses
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      globtype,
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      symtype,symsym,
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      node,nld,ncgld;
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    type
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      tx86loadnode = class(tcgloadnode)
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       protected
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         procedure generate_threadvar_access(gvs: tstaticvarsym); override;
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      end;
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implementation
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    uses
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      cutils,verbose,systems,
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      aasmbase,aasmtai,aasmdata,
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      cgutils,cgobj,
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      symconst,symdef,symtable,
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      cgbase,cpubase,parabase,paramgr;
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{*****************************************************************************
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                           TX86LOADNODE
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*****************************************************************************}
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    procedure tx86loadnode.generate_threadvar_access(gvs: tstaticvarsym);
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      var
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        paraloc1 : tcgpara;
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        pd: tprocdef;
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        href: treference;
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        hregister : tregister;
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        handled: boolean;
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      begin
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        handled:=false;
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        if (tf_section_threadvars in target_info.flags) then
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          begin
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            if target_info.system in [system_i386_win32,system_x86_64_win64] then
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              begin
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                paraloc1.init;
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                pd:=search_system_proc('fpc_tls_add');
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                paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
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                if not(vo_is_weak_external in gvs.varoptions) then
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                  reference_reset_symbol(href,current_asmdata.RefAsmSymbol(gvs.mangledname,AT_DATA,use_indirect_symbol(gvs)),0,sizeof(pint),[])
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                else
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                  reference_reset_symbol(href,current_asmdata.WeakRefAsmSymbol(gvs.mangledname,AT_DATA),0,sizeof(pint),[]);
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                cg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,href,paraloc1);
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                paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
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                paraloc1.done;
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                cg.g_call(current_asmdata.CurrAsmList,'FPC_TLS_ADD');
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                cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_FUNCTION_RESULT_REG);
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                hregister:=cg.getaddressregister(current_asmdata.CurrAsmList);
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                cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,hregister);
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                location.reference.base:=hregister;
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                handled:=true;
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              end;
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          end;
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        if not handled then
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          inherited;
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        if (tf_section_threadvars in target_info.flags) then
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          begin
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            case target_info.system of
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              system_i386_linux,system_i386_android:
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                location.reference.segment:=NR_GS;
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            end;
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          end;
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      end;
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begin
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   cloadnode:=tx86loadnode;
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end.
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