pierre 40ff777693 * Adapt to TExternCain move to aasmcpu unit ... + Make sure that a lone reference to DGROUP also generates a 'GROUP DGROUP' statement + Add %LINE support + Add $DEBUG for i8086 nasm git-svn-id: trunk@34080 -		2016-07-06 07:00:13 +00:00
..
aasmcpu.pas	Copy TExternChain type and AddSymbol procedure to unit aasmcpu from agx86nsm unit	2016-07-06 06:55:31 +00:00
agx86att.pas	Added x86_64-embedded target. Patch from Benjamin Rosseaux	2016-02-14 10:57:00 +00:00
agx86int.pas	+ generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation	2016-04-08 20:19:59 +00:00
agx86nsm.pas	* Adapt to TExternCain move to aasmcpu unit	2016-07-06 07:00:13 +00:00
aoptx86.pas	* r33995 was not complete	2016-06-16 19:26:43 +00:00
cga.pas
cgx86.pas	Use BX register instead of AX to reload DS at proc entry if register convention is used	2016-06-29 20:48:51 +00:00
cpubase.pas
hlcgx86.pas
itcpugas.pas
itx86int.pas
ni86mem.pas
nx86add.pas
nx86cal.pas
nx86cnv.pas
nx86con.pas
nx86inl.pas	* do not write any size suffix for cvt*ss2si, doing so makes no sense as the size of the single and the integer might be different on x86-64, resolves issue #30101	2016-05-08 18:50:53 +00:00
nx86ld.pas	nx86ld.pas, tx86loadnode:	2016-03-18 22:39:41 +00:00
nx86mat.pas	* correctly check left.location instead of left.expectloc when generating	2016-06-04 15:54:17 +00:00
nx86mem.pas
nx86set.pas	* correctly generate accesses to jump tables if it contains negative entries, resolves issue #30119	2016-05-22 21:02:49 +00:00
rax86.pas	* (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893.	2016-03-28 19:08:13 +00:00
rax86att.pas
rax86int.pas
rgx86.pas	* avoid spilling of 2nd and 3rd operand of avx instructions	2016-06-01 20:48:08 +00:00
symi86.pas
symx86.pas
x86ins.dat	* fix modification information of VCOMISS and VCOMISD	2016-06-01 19:58:43 +00:00
x86reg.dat