sergei 9cc0bdd6b9 + Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments. ... git-svn-id: trunk@29588 -		2015-01-30 22:45:05 +00:00
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aasmcpu.pas	+ Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments.	2015-01-30 22:45:05 +00:00
agarmgas.pas	* do not write a space before the condition for instructions without operands, not sure why this was there	2014-03-24 17:09:28 +00:00
aoptcpu.pas	Fixed breakage in the ARM peephole optimizer indirectly brought to light by r29189.	2014-12-01 14:39:40 +00:00
aoptcpub.pas	* ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions.	2014-09-22 16:18:16 +00:00
aoptcpuc.pas
aoptcpud.pas
armatt.inc	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armatts.inc	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armins.dat	+ Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments.	2015-01-30 22:45:05 +00:00
armnop.inc	+ Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments.	2015-01-30 22:45:05 +00:00
armop.inc	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armreg.dat	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
armtab.inc	+ Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments.	2015-01-30 22:45:05 +00:00
cgcpu.pas	* ARM: Fixed interface wrapper generation after r28542 for targets without BX instruction.	2015-01-30 15:00:28 +00:00
cpubase.pas	Reformat and comment is_thumb32_imm	2014-01-13 21:32:28 +00:00
cpuelf.pas	+ ARM internal linker: very initial support for Thumb mode, helloworld-class programs compiled with "-Cparmv6m -CIthumb" can now run.	2014-09-19 22:33:37 +00:00
cpuinfo.pas	+ change always floating point divisions into multiplications if they are a power of two,	2014-11-16 20:47:38 +00:00
cpunode.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00
cpupara.pas	* moved ARM-specific tprocdef.total_stackframe_size field to cpu-specific	2014-04-01 21:41:24 +00:00
cpupi.pas	* Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do).	2014-04-02 13:14:06 +00:00
cputarg.pas	* Sync with trunk r23404.	2013-01-16 13:21:51 +00:00
hlcgcpu.pas	* create/destroy also the high level code generator for all architectures,	2011-08-20 07:21:16 +00:00
itcpugas.pas	* remove unused units from uses statements	2013-01-03 23:07:09 +00:00
narmadd.pas	* generate AND for small set comparisons also when only set vars are involved using the cg class, so it works for arm thumb as well	2014-08-31 20:43:13 +00:00
narmcal.pas	* moved ARM/x86 ifdef'ed code from ncgcal to virtual methods	2013-04-07 13:42:06 +00:00
narmcnv.pas	+ support for LOC_(C)MMREGISTER in hlcg	2013-05-31 12:05:14 +00:00
narmcon.pas	* ARM: Test if range check of floating point constants is necessary in the same way as on other targets. This should have been part of r10940 6 years ago...	2014-04-22 06:51:54 +00:00
narminl.pas	Fixed generation of abs calls for thumb and thumb-2 targets.	2014-06-10 17:48:09 +00:00
narmmat.pas	{ARM} Implement usage of generic division-by-const optimization	2014-06-10 20:49:18 +00:00
narmmem.pas	+ arm: tsettings.instructionset	2013-08-25 21:56:12 +00:00
narmset.pas	* fixes jump table generate for arm thumb	2014-08-30 22:13:09 +00:00
pp.lpi.template
raarm.pas
raarmgas.pas	* fix warnings when compiling the compiler with DFA optimizer enabled on ARM	2014-08-20 13:16:58 +00:00
rarmcon.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmdwa.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmnor.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmnum.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmrni.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmsri.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmsta.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmstd.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmsup.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rgcpu.pas	* improved r28534: LDR/STR on thumb do not support registers >r7 as destination/source	2014-08-30 12:13:00 +00:00
symcpu.pas	Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym".	2014-04-11 14:30:59 +00:00