J. Gareth "Curious Kit" Moreton 45b1d592f5 * x86: Bug fix where "mov $0,%reg" was inserted on the wrong side of a SETcc instruction		2022-10-18 20:47:42 +00:00
..
aasmcpu.pas
agx86att.pas
agx86int.pas
agx86nsm.pas
aoptx86.pas	* x86: Bug fix where "mov $0,%reg" was inserted on the wrong side of a SETcc instruction	2022-10-18 20:47:42 +00:00
cga.pas
cgx86.pas	* x86: Added SARX to BMI2 code generator	2022-09-10 19:10:55 +00:00
cpubase.pas
cx86innr.inc
cx86mminnr.inc
hlcgx86.pas
itcpugas.pas
itx86int.pas
ni86mem.pas
nx86add.pas	* use the bts instruction on x86 if possible, the reg,reg variant is better than a mov/shl/or sequence	2022-09-05 23:24:05 +02:00
nx86cal.pas
nx86cnv.pas
nx86con.pas
nx86inl.pas
nx86ld.pas
nx86mat.pas	* x86: Made a check for BMI2 more explicit in the integer division code generator	2022-09-09 21:02:29 +00:00
nx86mem.pas
nx86set.pas
rax86.pas
rax86att.pas
rax86int.pas
rgx86.pas	* x86: Added BEXTR and BZHI to special spilling rules since they follow the same format as SHRX etc.	2022-09-10 19:10:55 +00:00
symi86.pas
symx86.pas
x86ins.dat
x86intr.dat
x86mmfirst.inc
x86mmsecond.inc
x86mmtype.inc
x86reg.dat