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https://gitlab.com/freepascal.org/fpc/source.git
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763 lines
25 KiB
ObjectPascal
763 lines
25 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2003 by Florian Klaempfl
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Contains the assembler object for the ARM
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aasmcpu;
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{$i fpcdefs.inc}
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interface
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uses
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cclasses,aasmtai,
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aasmbase,globals,verbose,
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cpubase,cpuinfo;
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const
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{ "mov reg,reg" source operand number }
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O_MOV_SOURCE = 1;
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{ "mov reg,reg" source operand number }
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O_MOV_DEST = 0;
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type
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taicpu = class(taicpu_abstract)
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procedure loadshifterop(opidx:longint;const so:tshifterop);
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constructor op_none(op : tasmop);
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constructor op_reg(op : tasmop;_op1 : tregister);
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constructor op_const(op : tasmop;_op1 : longint);
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constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
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constructor op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
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constructor op_reg_const(op:tasmop; _op1: tregister; _op2: longint);
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constructor op_const_reg(op:tasmop; _op1: longint; _op2: tregister);
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constructor op_const_const(op : tasmop;_op1,_op2 : longint);
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constructor op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
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constructor op_reg_reg_const(op : tasmop;_op1,_op2 : tregister; _op3: Longint);
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constructor op_reg_reg_sym_ofs(op : tasmop;_op1,_op2 : tregister; _op3: tasmsymbol;_op3ofs: longint);
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constructor op_reg_reg_ref(op : tasmop;_op1,_op2 : tregister; const _op3: treference);
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constructor op_const_reg_reg(op : tasmop;_op1 : longint;_op2, _op3 : tregister);
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constructor op_const_reg_const(op : tasmop;_op1 : longint;_op2 : tregister;_op3 : longint);
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constructor op_reg_reg_shifterop(op : tasmop;_op1,_op2 : tregister;_op3 : tshifterop);
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constructor op_reg_reg_reg_reg(op : tasmop;_op1,_op2,_op3,_op4 : tregister);
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constructor op_reg_reg_reg_const_const(op : tasmop;_op1,_op2,_op3 : tregister;_op4,_op5 : Longint);
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constructor op_reg_reg_const_const_const(op : tasmop;_op1,_op2 : tregister;_op3,_op4,_op5 : Longint);
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{ this is for Jmp instructions }
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constructor op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
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constructor op_const_const_sym(op : tasmop;_op1,_op2 : longint;_op3: tasmsymbol);
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constructor op_sym(op : tasmop;_op1 : tasmsymbol);
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constructor op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
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constructor op_reg_sym_ofs(op : tasmop;_op1 : tregister;_op2:tasmsymbol;_op2ofs : longint);
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constructor op_sym_ofs_ref(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint;const _op2 : treference);
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function is_nop: boolean; override;
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function is_move:boolean; override;
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function spill_registers(list:Taasmoutput;
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rgget:Trggetproc;
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rgunget:Trgungetproc;
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r:Tsupregset;
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var unusedregsint:Tsupregset;
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const spilltemplist:Tspill_temp_list):boolean; override;
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end;
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tai_align = class(tai_align_abstract)
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{ nothing to add }
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end;
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procedure InitAsm;
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procedure DoneAsm;
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implementation
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uses
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cutils,rgobj;
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procedure taicpu.loadshifterop(opidx:longint;const so:tshifterop);
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begin
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx] do
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begin
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if typ<>top_shifterop then
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new(shifterop);
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shifterop^:=so;
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typ:=top_shifterop;
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end;
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end;
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{*****************************************************************************
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taicpu Constructors
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*****************************************************************************}
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constructor taicpu.op_none(op : tasmop);
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begin
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inherited create(op);
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end;
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constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031207);
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ops:=1;
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loadreg(0,_op1);
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end;
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constructor taicpu.op_const(op : tasmop;_op1 : longint);
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begin
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inherited create(op);
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ops:=1;
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loadconst(0,aword(_op1));
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end;
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constructor taicpu.op_reg_reg(op : tasmop;_op1,_op2 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031205);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031206);
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ops:=2;
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loadreg(0,_op1);
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loadreg(1,_op2);
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end;
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constructor taicpu.op_reg_const(op:tasmop; _op1: tregister; _op2: longint);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031208);
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ops:=2;
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loadreg(0,_op1);
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loadconst(1,aword(_op2));
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end;
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constructor taicpu.op_const_reg(op:tasmop; _op1: longint; _op2: tregister);
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begin
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inherited create(op);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031209);
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ops:=2;
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loadconst(0,aword(_op1));
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loadreg(1,_op2);
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end;
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constructor taicpu.op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031210);
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ops:=2;
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loadreg(0,_op1);
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loadref(1,_op2);
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end;
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constructor taicpu.op_const_const(op : tasmop;_op1,_op2 : longint);
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begin
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inherited create(op);
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ops:=2;
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loadconst(0,aword(_op1));
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loadconst(1,aword(_op2));
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end;
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constructor taicpu.op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031211);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031212);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031213);
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ops:=3;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadreg(2,_op3);
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end;
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constructor taicpu.op_reg_reg_const(op : tasmop;_op1,_op2 : tregister; _op3: Longint);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031214);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031215);
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ops:=3;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadconst(2,aword(_op3));
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end;
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constructor taicpu.op_reg_reg_sym_ofs(op : tasmop;_op1,_op2 : tregister; _op3: tasmsymbol;_op3ofs: longint);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031216);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031217);
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ops:=3;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadsymbol(0,_op3,_op3ofs);
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end;
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constructor taicpu.op_reg_reg_ref(op : tasmop;_op1,_op2 : tregister; const _op3: treference);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031218);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031219);
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ops:=3;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadref(2,_op3);
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end;
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constructor taicpu.op_const_reg_reg(op : tasmop;_op1 : longint;_op2, _op3 : tregister);
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begin
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inherited create(op);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031221);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031220);
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ops:=3;
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loadconst(0,aword(_op1));
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loadreg(1,_op2);
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loadreg(2,_op3);
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end;
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constructor taicpu.op_const_reg_const(op : tasmop;_op1 : longint;_op2 : tregister;_op3 : longint);
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begin
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inherited create(op);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031222);
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ops:=3;
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loadconst(0,aword(_op1));
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loadreg(1,_op2);
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loadconst(2,aword(_op3));
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end;
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constructor taicpu.op_reg_reg_shifterop(op : tasmop;_op1,_op2 : tregister;_op3 : tshifterop);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(200308233);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(200308233);
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ops:=3;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadshifterop(2,_op3);
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end;
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constructor taicpu.op_reg_reg_reg_reg(op : tasmop;_op1,_op2,_op3,_op4 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031223);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031224);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031225);
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if (_op4.enum = R_INTREGISTER) and (_op4.number = NR_NO) then
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internalerror(2003031226);
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ops:=4;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadreg(2,_op3);
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loadreg(3,_op4);
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end;
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constructor taicpu.op_reg_reg_reg_const_const(op : tasmop;_op1,_op2,_op3 : tregister;_op4,_op5 : Longint);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031232);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031233);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031233);
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ops:=5;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadreg(2,_op3);
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loadconst(3,cardinal(_op4));
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loadconst(4,cardinal(_op5));
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end;
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constructor taicpu.op_reg_reg_const_const_const(op : tasmop;_op1,_op2 : tregister;_op3,_op4,_op5 : Longint);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031232);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031233);
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ops:=5;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadconst(2,aword(_op3));
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loadconst(3,cardinal(_op4));
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loadconst(4,cardinal(_op5));
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end;
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constructor taicpu.op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
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begin
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inherited create(op);
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condition:=cond;
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ops:=1;
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loadsymbol(0,_op1,0);
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end;
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constructor taicpu.op_const_const_sym(op : tasmop;_op1,_op2 : longint; _op3: tasmsymbol);
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begin
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inherited create(op);
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ops:=3;
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loadconst(0,aword(_op1));
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loadconst(1,aword(_op2));
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loadsymbol(2,_op3,0);
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end;
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constructor taicpu.op_sym(op : tasmop;_op1 : tasmsymbol);
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begin
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inherited create(op);
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ops:=1;
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loadsymbol(0,_op1,0);
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end;
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constructor taicpu.op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
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begin
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inherited create(op);
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ops:=1;
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loadsymbol(0,_op1,_op1ofs);
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end;
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constructor taicpu.op_reg_sym_ofs(op : tasmop;_op1 : tregister;_op2:tasmsymbol;_op2ofs : longint);
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begin
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inherited create(op);
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ops:=2;
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loadreg(0,_op1);
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loadsymbol(1,_op2,_op2ofs);
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end;
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constructor taicpu.op_sym_ofs_ref(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint;const _op2 : treference);
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begin
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inherited create(op);
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ops:=2;
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loadsymbol(0,_op1,_op1ofs);
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loadref(1,_op2);
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end;
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{ ****************************** newra stuff *************************** }
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function taicpu.is_nop: boolean;
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begin
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{ we don't insert any more nops than necessary }
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is_nop := false;
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end;
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function taicpu.is_move:boolean;
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begin
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is_move := opcode = A_MOV;
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end;
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function taicpu.spill_registers(list:Taasmoutput;
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rgget:Trggetproc;
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rgunget:Trgungetproc;
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r:Tsupregset;
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var unusedregsint:Tsupregset;
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const spilltemplist:Tspill_temp_list): boolean;
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{$ifdef dummy}
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function get_insert_pos(p:Tai;huntfor1,huntfor2,huntfor3:Tsuperregister):Tai;
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var back:Tsupregset;
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begin
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back:=unusedregsint;
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get_insert_pos:=p;
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while (p<>nil) and (p.typ=ait_regalloc) do
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begin
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{Rewind the register allocation.}
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if Tai_regalloc(p).allocation then
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include(unusedregsint,Tai_regalloc(p).reg.number shr 8)
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else
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begin
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exclude(unusedregsint,Tai_regalloc(p).reg.number shr 8);
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if Tai_regalloc(p).reg.number shr 8=huntfor1 then
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begin
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get_insert_pos:=Tai(p.previous);
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back:=unusedregsint;
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end;
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if Tai_regalloc(p).reg.number shr 8=huntfor2 then
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begin
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get_insert_pos:=Tai(p.previous);
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back:=unusedregsint;
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end;
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if Tai_regalloc(p).reg.number shr 8=huntfor3 then
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begin
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get_insert_pos:=Tai(p.previous);
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back:=unusedregsint;
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end;
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end;
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p:=Tai(p.previous);
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end;
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unusedregsint:=back;
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end;
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procedure forward_allocation(p:Tai);
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begin
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{Forward the register allocation again.}
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while (p<>self) do
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begin
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if p.typ<>ait_regalloc then
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internalerror(200305311);
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if Tai_regalloc(p).allocation then
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exclude(unusedregsint,Tai_regalloc(p).reg.number shr 8)
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else
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include(unusedregsint,Tai_regalloc(p).reg.number shr 8);
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p:=Tai(p.next);
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end;
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end;
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function decode_loadstore(op: tasmop; var counterpart: tasmop; wasload: boolean): boolean;
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begin
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result := true;
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wasload := true;
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case op of
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A_LBZ:
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begin
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counterpart := A_STB;
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end;
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A_LBZX:
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begin
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counterpart := A_STBX;
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end;
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A_LHZ,A_LHA:
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begin
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counterpart := A_STH;
|
|
end;
|
|
A_LHZX,A_LHAX:
|
|
begin
|
|
counterpart := A_STHX;
|
|
end;
|
|
A_LWZ:
|
|
begin
|
|
counterpart := A_STW;
|
|
end;
|
|
A_LWZX:
|
|
begin
|
|
counterpart := A_STWX;
|
|
end;
|
|
A_STB:
|
|
begin
|
|
counterpart := A_LBZ;
|
|
wasload := false;
|
|
end;
|
|
A_STBX:
|
|
begin
|
|
counterpart := A_LBZX;
|
|
wasload := false;
|
|
end;
|
|
A_STH:
|
|
begin
|
|
counterpart := A_LHZ;
|
|
wasload := false;
|
|
end;
|
|
A_STHX:
|
|
begin
|
|
counterpart := A_LHZX;
|
|
wasload := false;
|
|
end;
|
|
A_STW:
|
|
begin
|
|
counterpart := A_LWZ;
|
|
wasload := false;
|
|
end;
|
|
A_STWX:
|
|
begin
|
|
counterpart := A_LWZX;
|
|
wasload := false;
|
|
end;
|
|
A_LBZU,A_LBZUX,A_LHZU,A_LHZUX,A_LHAU,A_LHAUX,
|
|
A_LWZU,A_LWZUX,A_STBU,A_STBUX,A_STHU,A_STHUX,
|
|
A_STWU,A_STWUX:
|
|
internalerror(2003070602);
|
|
else
|
|
result := false;
|
|
end;
|
|
end;
|
|
|
|
|
|
var i:byte;
|
|
supreg, reg1, reg2, reg3: Tsuperregister;
|
|
helpreg:Tregister;
|
|
helpins:Taicpu;
|
|
op:Tasmop;
|
|
pos:Tai;
|
|
wasload: boolean;
|
|
|
|
begin
|
|
spill_registers:=false;
|
|
if (ops = 2) and
|
|
(oper[1].typ=top_ref) and
|
|
{ oper[1] can also be ref in case of "lis r3,symbol@ha" or so }
|
|
decode_loadstore(opcode,op,wasload) then
|
|
begin
|
|
{ the register that's being stored/loaded }
|
|
supreg:=oper[0].reg.number shr 8;
|
|
if supreg in r then
|
|
begin
|
|
// Example:
|
|
// l?? r20d, 8(r1) ; r20d must be spilled into -60(r1)
|
|
//
|
|
// Change into:
|
|
//
|
|
// l?? r21d, 8(r1)
|
|
// st? r21d, -60(r1)
|
|
//
|
|
// And:
|
|
//
|
|
// st? r20d, 8(r1) ; r20d must be spilled into -60(r1)
|
|
//
|
|
// Change into:
|
|
//
|
|
// l?? r21d, -60(r1)
|
|
// st? r21d, 8(r1)
|
|
|
|
pos := get_insert_pos(Tai(previous),oper[0].reg.number shr 8,
|
|
oper[1].ref^.base.number shr 8,oper[1].ref^.index.number shr 8);
|
|
rgget(list,pos,0,helpreg);
|
|
spill_registers := true;
|
|
if wasload then
|
|
begin
|
|
helpins := taicpu.op_reg_ref(opcode,helpreg,oper[1].ref^);
|
|
loadref(1,spilltemplist[supreg]);
|
|
opcode := op;
|
|
end
|
|
else
|
|
helpins := taicpu.op_reg_ref(op,helpreg,spilltemplist[supreg]);
|
|
if pos=nil then
|
|
list.insertafter(helpins,list.first)
|
|
else
|
|
list.insertafter(helpins,pos.next);
|
|
loadreg(0,helpreg);
|
|
rgunget(list,helpins,helpreg);
|
|
forward_allocation(tai(helpins.next));
|
|
{$ifdef debugra}
|
|
writeln('spilling!');
|
|
list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
|
|
{$endif debugra}
|
|
end;
|
|
|
|
{ now the registers used in the reference }
|
|
{ a) base }
|
|
supreg := oper[1].ref^.base.number shr 8;
|
|
if supreg in r then
|
|
begin
|
|
if wasload then
|
|
pos:=get_insert_pos(Tai(previous),oper[1].ref^.index.number shr 8,oper[0].reg.number shr 8,0)
|
|
else
|
|
pos:=get_insert_pos(Tai(previous),oper[1].ref^.index.number shr 8,0,0);
|
|
rgget(list,pos,0,helpreg);
|
|
spill_registers:=true;
|
|
helpins:=Taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
|
|
if pos=nil then
|
|
list.insertafter(helpins,list.first)
|
|
else
|
|
list.insertafter(helpins,pos.next);
|
|
oper[1].ref^.base:=helpreg;
|
|
rgunget(list,helpins,helpreg);
|
|
forward_allocation(Tai(helpins.next));
|
|
{$ifdef debugra}
|
|
writeln('spilling!');
|
|
list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
|
|
{$endif debugra}
|
|
end;
|
|
|
|
{ b) index }
|
|
supreg := oper[1].ref^.index.number shr 8;
|
|
if supreg in r then
|
|
begin
|
|
if wasload then
|
|
pos:=get_insert_pos(Tai(previous),oper[1].ref^.base.number shr 8,oper[0].reg.number shr 8,0)
|
|
else
|
|
pos:=get_insert_pos(Tai(previous),oper[1].ref^.base.number shr 8,0,0);
|
|
rgget(list,pos,0,helpreg);
|
|
spill_registers:=true;
|
|
helpins:=Taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
|
|
if pos=nil then
|
|
list.insertafter(helpins,list.first)
|
|
else
|
|
list.insertafter(helpins,pos.next);
|
|
oper[1].ref^.index:=helpreg;
|
|
rgunget(list,helpins,helpreg);
|
|
forward_allocation(Tai(helpins.next));
|
|
{$ifdef debugra}
|
|
writeln('spilling!');
|
|
list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
|
|
{$endif debugra}
|
|
end;
|
|
{ load/store is done }
|
|
exit;
|
|
end;
|
|
|
|
{ all other instructions the compiler generates are the same (I hope): }
|
|
{ operand 0 is a register and is the destination, the others are sources }
|
|
{ and can be either registers or constants }
|
|
{ exception: branches (is_jmp isn't always set for them) }
|
|
if oper[0].typ <> top_reg then
|
|
exit;
|
|
reg1 := oper[0].reg.number shr 8;
|
|
if oper[1].typ = top_reg then
|
|
reg2 := oper[1].reg.number shr 8
|
|
else
|
|
reg2 := 0;
|
|
if (ops >= 3) and
|
|
(oper[2].typ = top_reg) then
|
|
reg3 := oper[2].reg.number shr 8
|
|
else
|
|
reg3 := 0;
|
|
|
|
supreg:=reg1;
|
|
if supreg in r then
|
|
begin
|
|
// Example:
|
|
// add r20d, r21d, r22d ; r20d must be spilled into -60(r1)
|
|
//
|
|
// Change into:
|
|
//
|
|
// lwz r23d, -60(r1)
|
|
// add r23d, r21d, r22d
|
|
// stw r23d, -60(r1)
|
|
|
|
pos := get_insert_pos(Tai(previous),reg1,reg2,reg3);
|
|
rgget(list,pos,0,helpreg);
|
|
spill_registers := true;
|
|
helpins := taicpu.op_reg_ref(A_STW,helpreg,spilltemplist[supreg]);
|
|
list.insertafter(helpins,self);
|
|
helpins := taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
|
|
if pos=nil then
|
|
list.insertafter(helpins,list.first)
|
|
else
|
|
list.insertafter(helpins,pos.next);
|
|
loadreg(0,helpreg);
|
|
rgunget(list,helpins,helpreg);
|
|
forward_allocation(tai(helpins.next));
|
|
{$ifdef debugra}
|
|
writeln('spilling!');
|
|
list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
|
|
{$endif debugra}
|
|
end;
|
|
|
|
for i := 1 to 2 do
|
|
if (oper[i].typ = top_reg) then
|
|
begin
|
|
supreg:=oper[i].reg.number;
|
|
if supreg in r then
|
|
begin
|
|
// Example:
|
|
// add r20d, r21d, r22d ; r20d must be spilled into -60(r1)
|
|
//
|
|
// Change into:
|
|
//
|
|
// lwz r23d, -60(r1)
|
|
// add r23d, r21d, r22d
|
|
// stw r23d, -60(r1)
|
|
|
|
pos := get_insert_pos(Tai(previous),reg1,reg2,reg3);
|
|
rgget(list,pos,0,helpreg);
|
|
spill_registers := true;
|
|
helpins := taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
|
|
if pos=nil then
|
|
list.insertafter(helpins,list.first)
|
|
else
|
|
list.insertafter(helpins,pos.next);
|
|
loadreg(i,helpreg);
|
|
rgunget(list,helpins,helpreg);
|
|
forward_allocation(tai(helpins.next));
|
|
{$ifdef debugra}
|
|
writeln('spilling!');
|
|
list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
|
|
{$endif debugra}
|
|
end;
|
|
end;
|
|
end;
|
|
{$else dummy}
|
|
begin
|
|
end;
|
|
{$endif dummy}
|
|
|
|
|
|
procedure InitAsm;
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure DoneAsm;
|
|
begin
|
|
end;
|
|
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.3 2003-08-24 12:27:26 florian
|
|
* continued to work on the arm port
|
|
|
|
Revision 1.2 2003/08/20 15:50:12 florian
|
|
* more arm stuff
|
|
|
|
Revision 1.1 2003/08/16 13:23:01 florian
|
|
* several arm related stuff fixed
|
|
}
|