| .. |
|
a64att.inc
|
+ some opcodes added
|
2021-10-30 20:21:59 +02:00 |
|
a64atts.inc
|
+ some opcodes added
|
2021-10-30 20:21:59 +02:00 |
|
a64ins.dat
|
+ some opcodes added
|
2021-10-30 20:21:59 +02:00 |
|
a64nop.inc
|
|
|
|
a64op.inc
|
+ some opcodes added
|
2021-10-30 20:21:59 +02:00 |
|
a64reg.dat
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
a64tab.inc
|
|
|
|
aasmcpu.pas
|
+ Aaarch64: support adr instructions with local labels in the assembler reader
|
2021-11-19 22:37:47 +01:00 |
|
agcpugas.pas
|
Adding aaarch64-embedded target
|
2022-01-05 12:29:00 +00:00 |
|
aoptcpu.pas
|
* more readable fix for the missing ait_instruction check
|
2022-05-15 19:32:27 +02:00 |
|
aoptcpub.pas
|
|
|
|
aoptcpud.pas
|
|
|
|
cgcpu.pas
|
* avoid to create a stack frame on aarch64 if possible
|
2021-11-02 22:23:24 +01:00 |
|
cpubase.pas
|
* tcgsizep2size now supports all tcgsize values
|
2021-11-06 21:16:07 +01:00 |
|
cpuinfo.pas
|
* cleanup: cs_opt_loopunroll is a generic optimization for a long time already
|
2022-03-08 23:03:18 +01:00 |
|
cpunode.pas
|
Adding aaarch64-embedded target
|
2022-01-05 12:29:00 +00:00 |
|
cpupara.pas
|
* cleanup of VER3_0 defines
|
2021-11-17 22:19:57 +01:00 |
|
cpupi.pas
|
|
|
|
cputarg.pas
|
Adding aaarch64-embedded target
|
2022-01-05 12:29:00 +00:00 |
|
hlcgcpu.pas
|
* AArch64: fix storing a 32 bit value in the lower 32 bits of a 64 bit
|
2021-04-19 20:52:12 +00:00 |
|
itcpugas.pas
|
|
|
|
naarch64util.pas
|
Additional copyright header
|
2022-01-05 12:29:00 +00:00 |
|
ncpuadd.pas
|
|
|
|
ncpucnv.pas
|
|
|
|
ncpucon.pas
|
|
|
|
ncpuflw.pas
|
* patch by Marģers to unify internal error numbers, resolves #37888
|
2020-10-13 19:59:01 +00:00 |
|
ncpuinl.pas
|
+ in_min/max_dword/longint support for aarch64
|
2021-12-19 16:16:44 +01:00 |
|
ncpumat.pas
|
Avoid range/overflow error after commit #49290
|
2021-04-30 09:55:11 +00:00 |
|
ncpumem.pas
|
|
|
|
ncpuset.pas
|
|
|
|
ra64con.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64dwa.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64nor.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64num.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64rni.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64sri.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64sta.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64std.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
ra64sup.inc
|
Add cntfrq_el0 and cntpct_el0 AArch64 registers
|
2022-07-05 20:40:27 +00:00 |
|
racpu.pas
|
* AArch64: added SIMD instructions (only plain ARMv8-A for now)
|
2020-10-15 20:29:36 +00:00 |
|
racpugas.pas
|
AArch64 asm reader: add support for fpcmp(e) conditions
|
2022-04-03 13:40:21 +02:00 |
|
rgcpu.pas
|
* AArch64: fix spilling integer registers to stack offsets that cannot be
|
2021-04-14 20:56:32 +00:00 |
|
symcpu.pas
|
|
|
|
tripletcpu.pas
|
|
|
