fpc/compiler/i386
2016-12-03 19:00:41 +00:00
..
aoptcpu.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
aoptcpub.pas * i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same 2016-04-21 20:14:01 +00:00
aoptcpud.pas * i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same 2016-04-21 20:14:01 +00:00
cgcpu.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
cpubase.inc
cpuelf.pas Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 2014-12-14 16:28:35 +00:00
cpuinfo.pas + added 486 to the list of supported CPUs on the i8086 and i386 targets 2016-03-23 15:07:56 +00:00
cpunode.pas * automatically generate necessary indirect symbols when a new assembler 2016-07-20 20:53:03 +00:00
cpupara.pas syscalls: move the reference implementation of parseparaloc to paramgr. removes two identical copies from CPU specific code and enables basereg convention for AROS/x86_64. also, other minor fixes and cleanups in related code. 2016-12-03 19:00:41 +00:00
cpupi.pas * Keep the GOT offset in a virtual register for i386 non-darwin platforms. 2015-10-12 08:02:56 +00:00
cputarg.pas merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run. 2014-08-17 18:18:07 +00:00
hlcgcpu.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
i386att.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i386atts.inc * x86 AT&T reader and writer: cleaned up usage of attsufMM suffix: 2016-11-21 02:07:13 +00:00
i386int.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i386nop.inc * Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code. 2016-11-21 13:59:44 +00:00
i386op.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i386prop.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i386tab.inc * Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code. 2016-11-21 13:59:44 +00:00
n386add.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
n386cal.pas syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed 2016-12-02 09:29:09 +00:00
n386flw.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
n386inl.pas
n386ld.pas * factored out the loading of threadvars in its own method, and put the 2015-09-12 23:32:53 +00:00
n386mat.pas * i386: switch the div/mod node to shared code, leaving in place the specific optimization for division by power of 2. 2014-06-15 16:20:53 +00:00
n386mem.pas * moved x86-specific tpointerdef functionality to architecture-specific 2014-03-30 21:04:36 +00:00
n386set.pas
r386ari.inc
r386att.inc
r386con.inc
r386dwrf.inc
r386int.inc
r386iri.inc
r386nasm.inc
r386nor.inc
r386nri.inc
r386num.inc
r386ot.inc
r386rni.inc
r386sri.inc
r386stab.inc
r386std.inc
ra386att.pas
ra386int.pas
rgcpu.pas
symcpu.pas * changed getpointerdef() into a tpointerdef.getreusable() class method 2015-06-22 08:17:49 +00:00