nickysn 778a678956 * use a 4 byte alignment for the dwarf debug sections on i8086 (not sure if ... that's correct for 16-bit dwarf, but currently the compiler emits 4-byte tai_aligns, so setting the section alignment to 4 avoids problems in the internal object writer) git-svn-id: trunk@30685 -		2015-04-20 13:15:26 +00:00
..
aasmcpu.pas	+ choose the correct version of "Jcc near" to use on i8086 (386+ or 8086+)	2015-04-16 19:49:22 +00:00
agx86att.pas	+ iphonesim/x86_64 target (64 bit iOS simulator)	2015-02-23 22:56:09 +00:00
agx86int.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
agx86nsm.pas	* use a 4 byte alignment for the dwarf debug sections on i8086 (not sure if	2015-04-20 13:15:26 +00:00
cga.pas	+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.	2014-04-13 19:21:54 +00:00
cgx86.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
cpubase.pas	* fixed first_fpu_immreg definition	2015-04-04 14:29:09 +00:00
hlcgx86.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
itcpugas.pas
itx86int.pas
ni86mem.pas	* isolated segment-related functionality of tabsolutevarsym into i386/i8086-	2014-03-30 15:42:53 +00:00
nx86add.pas	x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.	2014-08-20 10:21:06 +00:00
nx86cal.pas	* pass a list of (pointers to) the paralocs to hlcgobj.a_call/g_call*, as	2014-03-06 21:40:57 +00:00
nx86cnv.pas	* renamed getdatalabel() to getglobaldatalabel	2015-03-27 21:25:34 +00:00
nx86con.pas
nx86inl.pas	* don't give an internalerror when trying to prefetch a regvar or even	2015-04-08 20:35:13 +00:00
nx86mat.pas	* renamed getdatalabel() to getglobaldatalabel	2015-03-27 21:25:34 +00:00
nx86mem.pas	* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe	2015-02-23 22:56:00 +00:00
nx86set.pas	* renamed getdatalabel() to getglobaldatalabel	2015-03-27 21:25:34 +00:00
rax86.pas	* in the inline asm reader, treat [var] reference as "word" instead of "dword"	2015-04-17 19:58:06 +00:00
rax86att.pas	- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.	2014-11-16 16:37:26 +00:00
rax86int.pas	* fixed endless recursion in tabstractrecorddef.contains_float_field() in	2015-04-16 21:25:22 +00:00
rgx86.pas	* synchronised with r28168 of trunk	2014-07-05 21:30:28 +00:00
symi86.pas	* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to	2014-04-12 15:34:08 +00:00
symx86.pas	* reimplemented r28329 in a different way, as suggested by Jonas	2014-08-07 19:36:52 +00:00
x86ins.dat	+ added i8086 instruction entries for Jcc near (which is actually a 386+	2015-04-16 17:07:07 +00:00
x86reg.dat