fpc/compiler/riscv
2025-01-07 22:51:16 +01:00
..
aasmcpu.pas * make use of LA pseudo-instruction 2024-12-25 18:35:46 +01:00
agrvgas.pas * make use of LA pseudo-instruction 2024-12-25 18:35:46 +01:00
aoptcpurv.pas Avoid wrong typecast by checking explictly that hp1 is indeed an instruction 2025-01-07 14:40:13 +00:00
cgrv.pas * set is_jmp 2025-01-07 22:51:16 +01:00
cpubase.pas + random bits for quad support on RiscV 2025-01-06 15:21:18 +01:00
hlcgrv.pas
itcpugas.pas + random bits for quad support on RiscV 2025-01-06 15:21:18 +01:00
nrvadd.pas * RiscV: more reliable use_fma 2024-11-18 22:32:55 +01:00
nrvcnv.pas
nrvcon.pas
nrvinl.pas + min/max optimization support for RiscV 2025-01-06 15:21:18 +01:00
nrvset.pas
nrvutil.pas * write basic attributes for riscvXX-linux 2024-12-30 15:56:24 +01:00
pararv.pas * RiscV: push_addr_param unified 2024-12-26 16:49:43 +01:00
rarv.pas
rarvgas.pas
rgcpu.pas
rvreg.dat + RiscV: vector registers 2024-12-25 10:34:46 +01:00