mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-10-31 05:31:29 +01:00
129 lines
3.8 KiB
ObjectPascal
129 lines
3.8 KiB
ObjectPascal
unit ATtiny12;
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interface
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var
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ACSR: byte absolute $08; // Analog Comparator Control And Status Register
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PINB: byte absolute $16; // Input Pins, Port B
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DDRB: byte absolute $17; // Data Direction Register, Port B
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PORTB: byte absolute $18; // Data Register, Port B
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EECR: byte absolute $1C; // EEPROM Control Register
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EEDR: byte absolute $1D; // EEPROM Data Register
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EEAR: byte absolute $1E; // EEPROM Read/Write Access
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WDTCR: byte absolute $21; // Watchdog Timer Control Register
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OSCCAL: byte absolute $31; // Status Register
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TCNT0: byte absolute $32; // Timer Counter 0
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TCCR0: byte absolute $33; // Timer/Counter0 Control Register
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MCUSR: byte absolute $34; // MCU Status register
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MCUCR: byte absolute $35; // MCU Control Register
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TIFR: byte absolute $38; // Timer/Counter Interrupt Flag register
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TIMSK: byte absolute $39; // Timer/Counter Interrupt Mask Register
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GIFR: byte absolute $3A; // General Interrupt Flag register
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GIMSK: byte absolute $3B; // General Interrupt Mask Register
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SREG: byte absolute $3F; // Status Register
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const
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// Analog Comparator Control And Status Register
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ACIS0 = $00; // Analog Comparator Interrupt Mode Select bits
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ACIS1 = $01; // Analog Comparator Interrupt Mode Select bits
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ACIE = $03;
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ACI = $04;
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ACO = $05;
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AINBG = $06;
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ACD = $07;
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// Data Register, Port B
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PB0 = $00;
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PB1 = $01;
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PB2 = $02;
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PB3 = $03;
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PB4 = $04;
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// EEPROM Control Register
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EERE = $00;
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EEWE = $01;
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EEMWE = $02;
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EERIE = $03;
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// Watchdog Timer Control Register
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WDP0 = $00; // Watch Dog Timer Prescaler bits
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WDP1 = $01; // Watch Dog Timer Prescaler bits
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WDP2 = $02; // Watch Dog Timer Prescaler bits
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WDE = $03;
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WDTOE = $04;
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// Status Register
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OSCCAL0 = $00; // Oscillator Calibration
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OSCCAL1 = $01; // Oscillator Calibration
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OSCCAL2 = $02; // Oscillator Calibration
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OSCCAL3 = $03; // Oscillator Calibration
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OSCCAL4 = $04; // Oscillator Calibration
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OSCCAL5 = $05; // Oscillator Calibration
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OSCCAL6 = $06; // Oscillator Calibration
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OSCCAL7 = $07; // Oscillator Calibration
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// Timer/Counter0 Control Register
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CS00 = $00;
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CS01 = $01;
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CS02 = $02;
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// MCU Status register
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PORF = $00;
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EXTRF = $01;
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BORF = $02;
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WDRF = $03;
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// MCU Control Register
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ISC00 = $00; // Interrupt Sense Control 0 bits
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ISC01 = $01; // Interrupt Sense Control 0 bits
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SM = $04;
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SE = $05;
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PUD = $06;
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// Timer/Counter Interrupt Flag register
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TOV0 = $01;
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// Timer/Counter Interrupt Mask Register
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TOIE0 = $01;
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// General Interrupt Flag register
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PCIF = $05;
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INTF0 = $06;
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// General Interrupt Mask Register
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PCIE = $05;
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INT0 = $06;
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// Status Register
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C = $00;
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Z = $01;
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N = $02;
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V = $03;
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S = $04;
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H = $05;
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T = $06;
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I = $07;
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implementation
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{$define RELBRANCHES}
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{$i avrcommon.inc}
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procedure INT0_ISR; external name 'INT0_ISR'; // Interrupt 1 External Interrupt 0
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procedure IO_PINS_ISR; external name 'IO_PINS_ISR'; // Interrupt 2 External Interrupt Request 0
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procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 3 Timer/Counter0 Overflow
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procedure EE_RDY_ISR; external name 'EE_RDY_ISR'; // Interrupt 4 EEPROM Ready
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procedure ANA_COMP_ISR; external name 'ANA_COMP_ISR'; // Interrupt 5 Analog Comparator
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procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
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asm
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rjmp __dtors_end
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rjmp INT0_ISR
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rjmp IO_PINS_ISR
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rjmp TIMER0_OVF_ISR
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rjmp EE_RDY_ISR
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rjmp ANA_COMP_ISR
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.weak INT0_ISR
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.weak IO_PINS_ISR
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.weak TIMER0_OVF_ISR
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.weak EE_RDY_ISR
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.weak ANA_COMP_ISR
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.set INT0_ISR, Default_IRQ_handler
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.set IO_PINS_ISR, Default_IRQ_handler
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.set TIMER0_OVF_ISR, Default_IRQ_handler
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.set EE_RDY_ISR, Default_IRQ_handler
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.set ANA_COMP_ISR, Default_IRQ_handler
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end;
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end.
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