Pierre Muller a9c67f22fd Add use of SD instruction in tcgmips.a_load_reg_ref method		2022-02-04 22:54:58 +00:00
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aasmcpu.pas
aoptcpu.pas	Also avoid invalid typecast for RegLoadedWithNewValue method for mips, sparcgen and xtensa	2021-04-12 08:57:23 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	Add use of SD instruction in tcgmips.a_load_reg_ref method	2022-02-04 22:54:58 +00:00
cpubase.pas
cpuelf.pas
cpugas.pas
cpuinfo.pas	* cleanup of 2.7.0 defines	2021-10-31 13:20:28 +01:00
cpunode.pas
cpupara.pas	* cleanup of VER3_0 defines	2021-11-17 22:19:57 +01:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
mipsreg.dat
ncpuadd.pas	* mips64el compiler can be compiled	2022-02-03 23:15:34 +01:00
ncpucall.pas
ncpucnv.pas
ncpuinln.pas
ncpuld.pas
ncpumat.pas	* mips64el compiler can be compiled	2022-02-03 23:15:34 +01:00
ncpuset.pas
opcode.inc
racpugas.pas
rgcpu.pas	+ sanity checks in mips and sparc register allocator	2021-12-17 21:25:17 +01:00
rmipscon.inc
rmipsdwf.inc
rmipsgas.inc
rmipsgri.inc
rmipsgss.inc
rmipsnor.inc
rmipsnum.inc
rmipsrni.inc
rmipssri.inc
rmipssta.inc
rmipsstd.inc
rmipssup.inc
strinst.inc
symcpu.pas
tripletcpu.pas