Jonas Maebe aa82e00615 * fixed check to determine whether a record parameter can be subscripted ... directly in inline assembly: that's only possible if it's a register parameter where the address of the record was passed (rather than the record itself), or if a parameter has been explicitly typecasted in Intel-style assembly using ".size" git-svn-id: trunk@35959 -		2017-04-26 19:43:35 +00:00
..
a64att.inc	* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by	2015-05-14 14:42:12 +00:00
a64atts.inc	* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by	2015-05-14 14:42:12 +00:00
a64ins.dat	* added some missing instructions and aliases, reordered them according	2015-02-23 22:48:24 +00:00
a64nop.inc	+ instruction table generator for arm64	2012-11-01 16:11:19 +00:00
a64op.inc	* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by	2015-05-14 14:42:12 +00:00
a64reg.dat	* fixed debug register values for vector registers	2015-02-23 22:54:15 +00:00
a64tab.inc	* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by	2015-05-14 14:42:12 +00:00
aasmcpu.pas	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
agcpugas.pas	* restructured the the TExternalAssembler constructors so that the	2016-11-09 19:51:20 +00:00
aoptcpu.pas	+ assembler optimizer unit skeleton	2012-11-01 20:09:12 +00:00
aoptcpub.pas	* completed TAoptBaseCpu.RegModifiedByInstruction()	2015-02-23 22:53:23 +00:00
aoptcpud.pas	+ assembler optimizer unit skeleton	2012-11-01 20:09:12 +00:00
cgcpu.pas	Fix aarch64 cycle after constant parser simplification change in rev 35229-35230	2017-01-05 13:41:44 +00:00
cpubase.pas	* recognise tb(n)z as branch opcode (patch by Edmund Grimley Evans)	2015-05-14 14:42:03 +00:00
cpuinfo.pas	- removed unused constants	2017-03-26 13:06:34 +00:00
cpunode.pas	* automatically generate necessary indirect symbols when a new assembler	2016-07-20 20:53:03 +00:00
cpupara.pas	* simplification of and fix for AArch64 cpupara.is_hfa_internal() (patch by	2016-08-12 16:53:02 +00:00
cpupi.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cputarg.pas	+ Linux/AArch64 compiler support (patch by Edmund Grimley Evans)	2015-05-22 09:25:05 +00:00
hlcgcpu.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
itcpugas.pas	+ ARM64 GAS instruction table unit	2012-11-01 20:09:47 +00:00
ncpuadd.pas	* force constants into a registers in the 32x32->64 optimized case	2015-02-28 22:31:03 +00:00
ncpucnv.pas	* replaced current_procinfo.currtrue/falselabel with storing the true/false	2015-08-27 18:28:57 +00:00
ncpuinl.pas	* switched to using the stack pointer as base register for the temp allocator	2015-02-23 22:54:03 +00:00
ncpumat.pas	* set pi_do_call for AArch64 mod/div nodes, as they call FPC_DIVBYZERO	2015-02-28 22:30:57 +00:00
ncpumem.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
ncpuset.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
ra64con.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
ra64dwa.inc	* fixed debug register values for vector registers	2015-02-23 22:54:15 +00:00
ra64nor.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
ra64num.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
ra64rni.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
ra64sri.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
ra64sta.inc	* fixed debug register values for vector registers	2015-02-23 22:54:15 +00:00
ra64std.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
ra64sup.inc	+ FPCR, FPSR and TPIDR registers	2015-02-23 22:50:44 +00:00
racpu.pas	+ Aarch64 assembler reader	2015-02-23 22:52:36 +00:00
racpugas.pas	* fixed check to determine whether a record parameter can be subscripted	2017-04-26 19:43:35 +00:00
rgcpu.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
symcpu.pas	o fixes handling of iso i/o parameters/program parameters:	2015-05-01 20:58:31 +00:00