mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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457 lines
10 KiB
ObjectPascal
457 lines
10 KiB
ObjectPascal
{******************************************************************************
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Register definitions and startup code for ATMEL ATtiny 24/44/84
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******************************************************************************}
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unit attinyx4;
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{$goto on}
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interface
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var
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PRR : byte absolute $20;
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DIDR0 : byte absolute $21;
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ADCSRB : byte absolute $23;
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ADCL : byte absolute $24;
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ADCH : byte absolute $25;
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ADC : word absolute $24;
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ADCSRA : byte absolute $26;
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ADMUX : byte absolute $27;
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ACSR : byte absolute $28;
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TIFR1 : byte absolute $2B;
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TIMSK1 : byte absolute $2C;
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USICR : byte absolute $2D;
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USISR : byte absolute $2E;
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USIDR : byte absolute $2F;
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USIBR : byte absolute $30;
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PCMSK0 : byte absolute $32;
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GPIOR0 : byte absolute $33;
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GPIOR1 : byte absolute $34;
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GPIOR2 : byte absolute $35;
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PINB : byte absolute $36;
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DDRB : byte absolute $37;
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PORTB : byte absolute $38;
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PINA : byte absolute $39;
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DDRA : byte absolute $3A;
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PORTA : byte absolute $3B;
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EECR : byte absolute $3C;
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EEDR : byte absolute $3D;
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EEARL : byte absolute $3E;
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EEARH : byte absolute $3F;
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EEAR : word absolute $3E;
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PCMSK1 : byte absolute $40;
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WDTCSR : byte absolute $41;
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TCCR1C : byte absolute $42;
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GTCCR : byte absolute $43;
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ICR1L : byte absolute $44;
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ICR1H : byte absolute $45;
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ICR1 : word absolute $44;
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CLKPR : byte absolute $46;
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DWDR : byte absolute $47;
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OCR1BL : byte absolute $48;
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OCR1BH : byte absolute $49;
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OCR1B : word absolute $48;
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OCR1AL : byte absolute $4A;
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OCR1AH : byte absolute $4B;
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OCR1A : word absolute $4A;
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TCNT1L : byte absolute $4C;
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TCNT1H : byte absolute $4D;
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TCNT1 : word absolute $4C;
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TCCR1B : byte absolute $4E;
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TCCR1A : byte absolute $4F;
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TCCR0A : byte absolute $50;
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OSCCAL : byte absolute $51;
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TCNT0 : byte absolute $52;
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TCCR0B : byte absolute $53;
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MCUSR : byte absolute $54;
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MCUCR : byte absolute $55;
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OCR0A : byte absolute $56;
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SPMCSR : byte absolute $57;
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TIFR0 : byte absolute $58;
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TIMSK0 : byte absolute $59;
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GIFR : byte absolute $5A;
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GIMSK : byte absolute $5B;
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OCR0B : byte absolute $5C;
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SPL : byte absolute $5D;
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SPH : byte absolute $5E;
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SP : word absolute $5D;
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SREG : byte absolute $5F;
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const
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{ PRR }
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PRTIM1 = 3;
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PRTIM0 = 2;
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PRUSI = 1;
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PRADC = 0;
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{ DIDR0 }
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ADC7D = 7;
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ADC6D = 6;
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ADC5D = 5;
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ADC4D = 4;
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ADC3D = 3;
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ADC2D = 2;
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ADC1D = 1;
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ADC0D = 0;
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{ ADCSRB }
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BIN = 7;
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ACME = 6;
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ADLAR = 4;
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ADTS2 = 2;
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ADTS1 = 1;
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ADTS0 = 0;
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{ ADCSRA }
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ADEN = 7;
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ADSC = 6;
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ADATE = 5;
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ADIF = 4;
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ADIE = 3;
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ADPS2 = 2;
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ADPS1 = 1;
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ADPS0 = 0;
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{ ADMUX }
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REFS1 = 7;
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REFS0 = 6;
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MUX5 = 5;
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MUX4 = 4;
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MUX3 = 3;
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MUX2 = 2;
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MUX1 = 1;
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MUX0 = 0;
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{ ACSR }
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ACD = 7;
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ACBG = 6;
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ACO = 5;
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ACI = 4;
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ACIE = 3;
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ACIC = 2;
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ACIS1 = 1;
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ACIS0 = 0;
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{ TIFR1 }
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ICF1 = 5;
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OCF1B = 2;
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OCF1A = 1;
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TOV1 = 0;
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{ TIMSK1 }
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ICIE1 = 5;
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OCIE1B = 2;
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OCIE1A = 1;
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TOIE1 = 0;
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{ USICR }
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USISIE = 7;
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USIOIE = 6;
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USIWM1 = 5;
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USIWM0 = 4;
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USICS1 = 3;
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USICS0 = 2;
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USICLK = 1;
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USITC = 0;
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{ USISR }
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USISIF = 7;
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USIOIF = 6;
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USIPF = 5;
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USIDC = 4;
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USICNT3 = 3;
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USICNT2 = 2;
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USICNT1 = 1;
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USICNT0 = 0;
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{ PCMSK0 }
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PCINT7 = 7;
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PCINT6 = 6;
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PCINT5 = 5;
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PCINT4 = 4;
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PCINT3 = 3;
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PCINT2 = 2;
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PCINT1 = 1;
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PCINT0 = 0;
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{ PINB }
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PINB3 = 3;
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PINB2 = 2;
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PINB1 = 1;
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PINB0 = 0;
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{ DDRB }
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DDB3 = 3;
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DDB2 = 2;
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DDB1 = 1;
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DDB0 = 0;
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{ PORTB }
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PORTB3 = 3;
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PORTB2 = 2;
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PORTB1 = 1;
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PORTB0 = 0;
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{ PINA }
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PINA7 = 7;
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PINA6 = 6;
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PINA5 = 5;
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PINA4 = 4;
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PINA3 = 3;
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PINA2 = 2;
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PINA1 = 1;
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PINA0 = 0;
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{ DDRA }
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DDA7 = 7;
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DDA6 = 6;
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DDA5 = 5;
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DDA4 = 4;
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DDA3 = 3;
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DDA2 = 2;
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DDA1 = 1;
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DDA0 = 0;
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{ PORTA }
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PORTA7 = 7;
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PORTA6 = 6;
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PORTA5 = 5;
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PORTA4 = 4;
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PORTA3 = 3;
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PORTA2 = 2;
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PORTA1 = 1;
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PORTA0 = 0;
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{ EECR }
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EEPM1 = 5;
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EEPM0 = 4;
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EERIE = 3;
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EEMPE = 2;
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EEPE = 1;
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EERE = 0;
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{ EEARL }
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EEAR7 = 7;
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EEAR6 = 6;
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EEAR5 = 5;
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EEAR4 = 4;
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EEAR3 = 3;
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EEAR2 = 2;
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EEAR1 = 1;
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EEAR0 = 0;
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{ EEARH }
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EEAR8 = 0;
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{ PCMSK1 }
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PCINT11 = 3;
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PCINT10 = 2;
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PCINT9 = 1;
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PCINT8 = 0;
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{ WDTCSR }
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WDIF = 7;
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WDIE = 6;
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WDP3 = 5;
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WDCE = 4;
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WDE = 3;
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WDP2 = 2;
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WDP1 = 1;
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WDP0 = 0;
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{ TCCR1C }
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FOC1A = 7;
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FOC1B = 6;
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{ GTCCR }
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TSM = 7;
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PSR10 = 0;
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{ CLKPR }
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CLKPCE = 7;
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CLKPS3 = 3;
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CLKPS2 = 2;
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CLKPS1 = 1;
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CLKPS0 = 0;
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{ TCCR1B }
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ICNC1 = 7;
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ICES1 = 6;
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WGM13 = 4;
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WGM12 = 3;
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CS12 = 2;
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CS11 = 1;
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CS10 = 0;
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{ TCCR1A }
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COM1A1 = 7;
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COM1A0 = 6;
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COM1B1 = 5;
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COM1B0 = 4;
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WGM11 = 1;
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WGM10 = 0;
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{ TCCR0A }
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COM0A1 = 7;
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COM0A0 = 6;
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COM0B1 = 5;
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COM0B0 = 4;
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WGM01 = 1;
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WGM00 = 0;
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{ OSCCAL }
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CAL7 = 7;
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CAL6 = 6;
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CAL5 = 5;
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CAL4 = 4;
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CAL3 = 3;
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CAL2 = 2;
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CAL1 = 1;
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CAL0 = 0;
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{ TCCR0B }
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FOC0A = 7;
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FOC0B = 6;
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WGM02 = 3;
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CS02 = 2;
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CS01 = 1;
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CS00 = 0;
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{ MCUSR }
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WDRF = 3;
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BORF = 2;
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EXTRF = 1;
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PORF = 0;
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{ MCUCR }
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BODS = 7;
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PUD = 6;
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SE = 5;
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SM1 = 4;
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SM0 = 3;
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BODSE = 2;
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ISC01 = 1;
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ISC00 = 0;
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{ SPMCSR }
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RSIG = 5;
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CTPB = 4;
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RFLB = 3;
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PGWRT = 2;
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PGERS = 1;
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SPMEN = 0;
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{ TIFR0 }
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OCF0B = 2;
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OCF0A = 1;
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TOV0 = 0;
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{ TIMSK0 }
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OCIE0B = 2;
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OCIE0A = 1;
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TOIE0 = 0;
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{ GIFR }
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INTF0 = 6;
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PCIF1 = 5;
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PCIF0 = 4;
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{ GIMSK }
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INT0 = 6;
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PCIE1 = 5;
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PCIE0 = 4;
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{$define RELBRANCHES}
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implementation
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{$i avrcommon.inc}
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procedure Int00Handler; external name 'Int00Handler';
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procedure Int01Handler; external name 'Int01Handler';
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procedure Int02Handler; external name 'Int02Handler';
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procedure Int03Handler; external name 'Int03Handler';
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procedure Int04Handler; external name 'Int04Handler';
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procedure Int05Handler; external name 'Int05Handler';
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procedure Int06Handler; external name 'Int06Handler';
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procedure Int07Handler; external name 'Int07Handler';
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procedure Int08Handler; external name 'Int08Handler';
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procedure Int09Handler; external name 'Int09Handler';
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procedure Int10Handler; external name 'Int10Handler';
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procedure Int11Handler; external name 'Int11Handler';
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procedure Int12Handler; external name 'Int12Handler';
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procedure Int13Handler; external name 'Int13Handler';
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procedure Int14Handler; external name 'Int14Handler';
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procedure Int15Handler; external name 'Int15Handler';
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procedure Int16Handler; external name 'Int16Handler';
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procedure _FPC_start; assembler; nostackframe;
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label
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_start;
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asm
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.init
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.globl _start
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rjmp _start
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rjmp Int00Handler
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rjmp Int01Handler
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rjmp Int02Handler
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rjmp Int03Handler
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rjmp Int04Handler
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rjmp Int05Handler
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rjmp Int06Handler
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rjmp Int07Handler
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rjmp Int08Handler
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rjmp Int09Handler
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rjmp Int10Handler
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rjmp Int11Handler
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rjmp Int12Handler
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rjmp Int13Handler
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rjmp Int14Handler
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rjmp Int15Handler
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rjmp Int16Handler
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{
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all ATMEL MCUs use the same startup code, the details are
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governed by defines
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}
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{$i start.inc}
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.weak Int00Handler
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.weak Int01Handler
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.weak Int02Handler
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.weak Int03Handler
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.weak Int04Handler
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.weak Int05Handler
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.weak Int06Handler
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.weak Int07Handler
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.weak Int08Handler
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.weak Int09Handler
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.weak Int10Handler
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.weak Int11Handler
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.weak Int12Handler
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.weak Int13Handler
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.weak Int14Handler
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.weak Int15Handler
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.weak Int16Handler
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.set Int00Handler, Default_IRQ_handler
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.set Int01Handler, Default_IRQ_handler
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.set Int02Handler, Default_IRQ_handler
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.set Int03Handler, Default_IRQ_handler
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.set Int04Handler, Default_IRQ_handler
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.set Int05Handler, Default_IRQ_handler
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.set Int06Handler, Default_IRQ_handler
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.set Int07Handler, Default_IRQ_handler
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.set Int08Handler, Default_IRQ_handler
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.set Int09Handler, Default_IRQ_handler
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.set Int10Handler, Default_IRQ_handler
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.set Int11Handler, Default_IRQ_handler
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.set Int12Handler, Default_IRQ_handler
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.set Int13Handler, Default_IRQ_handler
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.set Int14Handler, Default_IRQ_handler
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.set Int15Handler, Default_IRQ_handler
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.set Int16Handler, Default_IRQ_handler
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end;
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end.
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