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https://gitlab.com/freepascal.org/fpc/source.git
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833 lines
30 KiB
ObjectPascal
833 lines
30 KiB
ObjectPascal
{
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Copyright (c) 2000-2002 by the FPC development team
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Code generation for add nodes (generic version)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,cpubase,cgbase;
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type
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tcgaddnode = class(taddnode)
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{ function pass_1: tnode; override;}
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procedure pass_generate_code;override;
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protected
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{ call secondpass for both left and right }
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procedure pass_left_right; virtual;
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{ set the register of the result location }
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procedure set_result_location_reg;
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{ load left and right nodes into registers }
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procedure force_reg_left_right(allow_swap,allow_constant:boolean); virtual;
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function cmpnode2topcmp(unsigned: boolean): TOpCmp;
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procedure second_opfloat;
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procedure second_opboolean;
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procedure second_opsmallset;
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procedure second_op64bit;
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procedure second_opordinal;
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procedure second_addstring;virtual;
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procedure second_addfloat;virtual;abstract;
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procedure second_addboolean;virtual;
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procedure second_addsmallset;virtual;
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procedure second_addsmallsetelement;virtual;
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{$ifdef x86}
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{$ifdef SUPPORT_MMX}
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procedure second_opmmx;virtual;abstract;
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{$endif SUPPORT_MMX}
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{$endif x86}
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procedure second_opvector;virtual;abstract;
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procedure second_add64bit;virtual;
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procedure second_addordinal;virtual;
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procedure second_cmpfloat;virtual;abstract;
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procedure second_cmpboolean;virtual;
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procedure second_cmpsmallset;virtual;abstract;
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procedure second_cmp64bit;virtual;abstract;
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procedure second_cmpordinal;virtual;abstract;
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function needoverflowcheck: boolean;
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end;
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implementation
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uses
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globtype,systems,
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verbose,globals,
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symconst,symdef,
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aasmbase,aasmdata,defutil,
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pass_2,tgobj,
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nutils,nset,ncgutil,cgobj,cgutils,
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hlcgobj
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;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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procedure tcgaddnode.pass_left_right;
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{$if defined(x86) and not defined(llvm)}
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var
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tmpreg : tregister;
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pushedfpu : boolean;
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{$endif x86 and not llvm}
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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{ in case of constant put it to the left }
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if (left.nodetype=ordconstn) then
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swapleftright;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
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{$if defined(x86) and not defined(llvm)}
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{ are too few registers free? }
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pushedfpu:=false;
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if (left.location.loc=LOC_FPUREGISTER) and
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(node_resources_fpu(right)>=maxfpuregs) then
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begin
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hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
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pushedfpu:=true;
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end;
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{$endif x86 and not llvm}
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secondpass(right);
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if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,false);
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{$if defined(x86) and not defined(llvm)}
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if pushedfpu then
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begin
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if use_vectorfpu(left.resultdef) then
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begin
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tmpreg := cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
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hlcg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,tmpreg,mms_movescalar);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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location_reset(left.location,LOC_MMREGISTER,left.location.size);
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left.location.register:=tmpreg;
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end
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else
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begin
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tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
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cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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location_reset(left.location,LOC_FPUREGISTER,left.location.size);
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left.location.register := tmpreg;
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{ left operand is now on top of the stack, instead of the right one! }
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if (right.location.loc=LOC_FPUREGISTER) then
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toggleflag(nf_swapped);
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end;
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end;
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{$endif x86 and not llvm}
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end;
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procedure tcgaddnode.set_result_location_reg;
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begin
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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{$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
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if location.size in [OS_64,OS_S64] then
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begin
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location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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end
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else
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{$endif}
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location.register := hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
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end;
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procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
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begin
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if (left.location.loc<>LOC_REGISTER) and
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not(
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allow_constant and
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(left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
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) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
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if (right.location.loc<>LOC_REGISTER) and
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not(
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allow_constant and
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(right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
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(left.location.loc<>LOC_CONSTANT)
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) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
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{ Left is always a register, right can be register or constant }
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if left.location.loc=LOC_CONSTANT then
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begin
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{ when it is not allowed to swap we have a constant on
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left, that will give problems }
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if not allow_swap then
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internalerror(200307043);
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swapleftright;
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end;
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end;
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function tcgaddnode.cmpnode2topcmp(unsigned: boolean): TOpCmp;
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begin
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if unsigned then
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case nodetype of
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gtn: result:=OC_A;
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gten: result:=OC_AE;
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ltn: result:=OC_B;
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lten: result:=OC_BE;
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equaln: result:=OC_EQ;
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unequaln: result:=OC_NE;
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else
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internalerror(2011010412);
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end
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else
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case nodetype of
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gtn: result:=OC_GT;
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gten: result:=OC_GTE;
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ltn: result:=OC_LT;
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lten: result:=OC_LTE;
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equaln: result:=OC_EQ;
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unequaln: result:=OC_NE;
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else
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internalerror(2011010403);
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end
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end;
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{*****************************************************************************
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Smallsets
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*****************************************************************************}
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procedure tcgaddnode.second_opsmallset;
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begin
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{ when a setdef is passed, it has to be a smallset }
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if not(
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((left.nodetype=setelementn) or is_smallset(left.resultdef)) and
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((right.nodetype=setelementn) or is_smallset(right.resultdef))
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) then
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internalerror(200203302);
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if (left.nodetype=setelementn) or (right.nodetype=setelementn) then
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second_addsmallsetelement
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else if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
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second_cmpsmallset
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else
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second_addsmallset;
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end;
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procedure tcgaddnode.second_addsmallset;
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var
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cgop : TOpCg;
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opdone : boolean;
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begin
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opdone := false;
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pass_left_right;
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force_reg_left_right(true,true);
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set_result_location_reg;
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case nodetype of
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addn :
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cgop:=OP_OR;
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symdifn :
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cgop:=OP_XOR;
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muln :
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cgop:=OP_AND;
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subn :
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begin
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cgop:=OP_AND;
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if (not(nf_swapped in flags)) then
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if (right.location.loc=LOC_CONSTANT) then
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right.location.value := not(right.location.value)
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else
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opdone := true
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else if (left.location.loc=LOC_CONSTANT) then
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left.location.value := not(left.location.value)
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else
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begin
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swapleftright;
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opdone := true;
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end;
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if opdone then
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begin
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if (right.location.size<>left.location.size) or
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(location.size<>left.location.size) then
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internalerror(2010123001);
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{ make sure that location.register is different from
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left.location.register, since right will overwrite it
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and we'll use left afterwards }
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if (right.location.loc=LOC_REGISTER) then
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location.register:=right.location.register
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else
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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{ make sure we don't modify left/right.location, because we told
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force_reg_left_right above that they can be constant }
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hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,resultdef,right.location.register,location.register);
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if left.location.loc = LOC_CONSTANT then
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hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,resultdef,left.location.value,location.register)
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else
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hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,resultdef,left.location.register,location.register);
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end;
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end;
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else
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internalerror(2002072701);
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end;
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if not opdone then
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begin
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// these are all commutative operations
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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if (right.location.loc = LOC_CONSTANT) then
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hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
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right.location.value,left.location.register,
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location.register)
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else
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hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
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right.location.register,left.location.register,
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location.register);
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end;
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end;
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procedure tcgaddnode.second_addsmallsetelement;
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var
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tmpreg : tregister;
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mask,
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setbase : aint;
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cgop : TOpCg;
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begin
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if nodetype<>addn then
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internalerror(20080302);
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{ no range support for smallsets }
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if assigned(tsetelementnode(right).right) then
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internalerror(20080303);
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pass_left_right;
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{ setelementn is a special case, it must be on right }
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if (nf_swapped in flags) and
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(left.nodetype=setelementn) then
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swapleftright;
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force_reg_left_right(false,false);
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set_result_location_reg;
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setbase:=tsetdef(left.resultdef).setbase;
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if (right.location.loc = LOC_CONSTANT) then
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begin
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if (target_info.endian=endian_big) then
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mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase))
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else
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mask:=aint(1 shl (right.location.value-setbase));
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hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,resultdef,
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mask,left.location.register,location.register);
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end
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else
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begin
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if (target_info.endian=endian_big) then
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begin
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mask:=aint((aword(1) shl (resultdef.size*8-1)));
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cgop:=OP_SHR
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end
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else
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begin
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mask:=1;
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cgop:=OP_SHL
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end;
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tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
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hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,mask,tmpreg);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,true);
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register_maybe_adjust_setbase(current_asmdata.CurrAsmList,resultdef,right.location,setbase);
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hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
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right.location.register,tmpreg);
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if left.location.loc <> LOC_CONSTANT then
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hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,resultdef,tmpreg,
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left.location.register,location.register)
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else
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hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,resultdef,
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left.location.value,tmpreg,location.register);
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end;
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end;
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{*****************************************************************************
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Boolean
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*****************************************************************************}
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procedure tcgaddnode.second_opboolean;
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begin
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if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
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second_cmpboolean
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else
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second_addboolean;
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end;
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procedure tcgaddnode.second_addboolean;
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var
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cgop : TOpCg;
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truelabel, falselabel : tasmlabel;
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oldflowcontrol : tflowcontrol;
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begin
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{ And,Or will only evaluate from left to right only the
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needed nodes unless full boolean evaluation is enabled }
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if (nodetype in [orn,andn]) and
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(not(cs_full_boolean_eval in current_settings.localswitches) or
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(nf_short_bool in flags)) then
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begin
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case nodetype of
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andn :
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begin
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secondpass(left);
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hlcg.maketojumpbool(current_asmdata.CurrAsmList,left);
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hlcg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
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current_asmdata.getjumplabel(truelabel);
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location_reset_jump(location,truelabel,left.location.falselabel);
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end;
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orn :
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begin
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secondpass(left);
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hlcg.maketojumpbool(current_asmdata.CurrAsmList,left);
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hlcg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
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current_asmdata.getjumplabel(falselabel);
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location_reset_jump(location,left.location.truelabel,falselabel);
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end;
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else
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internalerror(200307044);
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end;
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{ these jumps mean we're now in a flow control construct }
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oldflowcontrol:=flowcontrol;
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include(flowcontrol,fc_inflowcontrol);
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secondpass(right);
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{ jump to the same labels as the left side, since the andn/orn
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merges the results of left and right }
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hlcg.maketojumpboollabels(current_asmdata.CurrAsmList,right,location.truelabel,location.falselabel);
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flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
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end
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else
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begin
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pass_left_right;
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force_reg_left_right(false,true);
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set_result_location_reg;
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case nodetype of
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xorn :
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cgop:=OP_XOR;
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orn :
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cgop:=OP_OR;
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andn :
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cgop:=OP_AND;
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else
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internalerror(200203247);
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end;
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{$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
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if right.location.size in [OS_64,OS_S64] then
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begin
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if right.location.loc <> LOC_CONSTANT then
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cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
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left.location.register64,right.location.register64,
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location.register64)
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else
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cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
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right.location.value,left.location.register64,
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location.register64);
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end
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else
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{$endif cpu64bitalu}
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begin
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if right.location.loc <> LOC_CONSTANT then
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hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
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left.location.register,right.location.register,
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location.register)
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else
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hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
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right.location.value,left.location.register,
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location.register);
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end;
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end;
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end;
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{*****************************************************************************
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64-bit
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*****************************************************************************}
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procedure tcgaddnode.second_op64bit;
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begin
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if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
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second_cmp64bit
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else
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second_add64bit;
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end;
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procedure tcgaddnode.second_add64bit;
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var
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op : TOpCG;
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checkoverflow : boolean;
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ovloc : tlocation;
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begin
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ovloc.loc:=LOC_VOID;
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pass_left_right;
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force_reg_left_right(false,true);
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set_result_location_reg;
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{ assume no overflow checking is required }
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checkoverflow := false;
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case nodetype of
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addn :
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begin
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op:=OP_ADD;
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checkoverflow:=true;
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|
end;
|
|
subn :
|
|
begin
|
|
op:=OP_SUB;
|
|
checkoverflow:=true;
|
|
end;
|
|
xorn:
|
|
op:=OP_XOR;
|
|
orn:
|
|
op:=OP_OR;
|
|
andn:
|
|
op:=OP_AND;
|
|
muln:
|
|
begin
|
|
{ should be handled in pass_1 (JM) }
|
|
internalerror(200109051);
|
|
end;
|
|
else
|
|
internalerror(2002072705);
|
|
end;
|
|
|
|
checkoverflow:=
|
|
checkoverflow and
|
|
needoverflowcheck;
|
|
|
|
{$if defined(cpu64bitalu) or defined(cpuhighleveltarget)}
|
|
case nodetype of
|
|
xorn,orn,andn,addn:
|
|
begin
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,right.location.value,
|
|
left.location.register,location.register)
|
|
else
|
|
hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,resultdef,right.location.register,
|
|
left.location.register,location.register);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swapped in flags) then
|
|
swapleftright;
|
|
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
// reg64 - reg64
|
|
hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
|
|
right.location.register,left.location.register,location.register,
|
|
checkoverflow,ovloc)
|
|
else
|
|
// reg64 - const64
|
|
hlcg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
|
|
right.location.value,left.location.register,location.register,
|
|
checkoverflow,ovloc);
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
|
|
hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
|
|
right.location.register,left.location.register,location.register,
|
|
checkoverflow,ovloc);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072803);
|
|
end;
|
|
{$else cpu64bitalu or cpuhighleveltarget}
|
|
case nodetype of
|
|
xorn,orn,andn,addn:
|
|
begin
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
|
|
left.location.register64,location.register64,
|
|
checkoverflow,ovloc)
|
|
else
|
|
cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
|
|
left.location.register64,location.register64,
|
|
checkoverflow,ovloc);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swapped in flags) then
|
|
swapleftright;
|
|
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
// reg64 - reg64
|
|
cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register64,left.location.register64,
|
|
location.register64,
|
|
checkoverflow,ovloc)
|
|
else
|
|
// reg64 - const64
|
|
cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.value64,left.location.register64,
|
|
location.register64,
|
|
checkoverflow,ovloc)
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
|
|
cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register64,left.location.register64,
|
|
location.register64,
|
|
checkoverflow,ovloc);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072804);
|
|
end;
|
|
{$endif cpu64bitalu or cpuhighleveltarget}
|
|
|
|
{ emit overflow check if enabled }
|
|
if checkoverflow then
|
|
hlcg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Strings
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_addstring;
|
|
begin
|
|
{ this should already be handled in pass1 }
|
|
internalerror(2002072402);
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Floats
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opfloat;
|
|
begin
|
|
if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
|
|
second_cmpfloat
|
|
else
|
|
second_addfloat;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Ordinals
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opordinal;
|
|
begin
|
|
if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
|
|
second_cmpordinal
|
|
else
|
|
second_addordinal;
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_addordinal;
|
|
var
|
|
unsigned,
|
|
checkoverflow : boolean;
|
|
cgop : topcg;
|
|
tmpreg : tregister;
|
|
ovloc : tlocation;
|
|
begin
|
|
ovloc.loc:=LOC_VOID;
|
|
|
|
pass_left_right;
|
|
force_reg_left_right(false,true);
|
|
set_result_location_reg;
|
|
|
|
{ determine if the comparison will be unsigned }
|
|
unsigned:=not(is_signed(left.resultdef)) or
|
|
not(is_signed(right.resultdef));
|
|
|
|
{ assume no overflow checking is require }
|
|
checkoverflow := false;
|
|
|
|
case nodetype of
|
|
addn:
|
|
begin
|
|
cgop:=OP_ADD;
|
|
checkoverflow:=true;
|
|
end;
|
|
xorn :
|
|
begin
|
|
cgop:=OP_XOR;
|
|
end;
|
|
orn :
|
|
begin
|
|
cgop:=OP_OR;
|
|
end;
|
|
andn:
|
|
begin
|
|
cgop:=OP_AND;
|
|
end;
|
|
muln:
|
|
begin
|
|
checkoverflow:=true;
|
|
if unsigned then
|
|
cgop:=OP_MUL
|
|
else
|
|
cgop:=OP_IMUL;
|
|
end;
|
|
subn :
|
|
begin
|
|
checkoverflow:=true;
|
|
cgop:=OP_SUB;
|
|
end;
|
|
else
|
|
internalerror(2013120104);
|
|
end;
|
|
|
|
checkoverflow:=
|
|
checkoverflow and
|
|
(left.resultdef.typ<>pointerdef) and
|
|
(right.resultdef.typ<>pointerdef) and
|
|
(cs_check_overflow in current_settings.localswitches) and not(nf_internal in flags);
|
|
|
|
if nodetype<>subn then
|
|
begin
|
|
if (right.location.loc<>LOC_CONSTANT) then
|
|
hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,resultdef,
|
|
left.location.register,right.location.register,
|
|
location.register,checkoverflow,ovloc)
|
|
else
|
|
hlcg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,resultdef,
|
|
right.location.value,left.location.register,
|
|
location.register,checkoverflow,ovloc);
|
|
end
|
|
else { subtract is a special case since its not commutative }
|
|
begin
|
|
if (nf_swapped in flags) then
|
|
swapleftright;
|
|
if left.location.loc<>LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc<>LOC_CONSTANT then
|
|
hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
|
|
right.location.register,left.location.register,
|
|
location.register,checkoverflow,ovloc)
|
|
else
|
|
hlcg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
|
|
right.location.value,left.location.register,
|
|
location.register,checkoverflow,ovloc);
|
|
end
|
|
else
|
|
begin
|
|
tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
|
|
hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,
|
|
left.location.value,tmpreg);
|
|
hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
|
|
right.location.register,tmpreg,location.register,checkoverflow,ovloc);
|
|
end;
|
|
end;
|
|
|
|
{ emit overflow check if required }
|
|
if checkoverflow then
|
|
hlcg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_cmpboolean;
|
|
begin
|
|
second_cmpordinal;
|
|
end;
|
|
|
|
function tcgaddnode.needoverflowcheck: boolean;
|
|
begin
|
|
result:=
|
|
(cs_check_overflow in current_settings.localswitches) and
|
|
(left.resultdef.typ<>pointerdef) and
|
|
(right.resultdef.typ<>pointerdef) and
|
|
not(nf_internal in flags);
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
pass_generate_code;
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.pass_generate_code;
|
|
begin
|
|
case left.resultdef.typ of
|
|
orddef :
|
|
begin
|
|
{ handling boolean expressions }
|
|
if is_boolean(left.resultdef) and
|
|
is_boolean(right.resultdef) then
|
|
second_opboolean
|
|
{ 64bit operations }
|
|
else if is_64bit(left.resultdef) then
|
|
second_op64bit
|
|
else
|
|
second_opordinal;
|
|
end;
|
|
stringdef :
|
|
begin
|
|
second_addstring;
|
|
end;
|
|
setdef :
|
|
begin
|
|
if is_smallset(tsetdef(left.resultdef)) then
|
|
second_opsmallset
|
|
else
|
|
internalerror(200109041);
|
|
end;
|
|
arraydef :
|
|
begin
|
|
{ support dynarr=nil }
|
|
if is_dynamic_array(left.resultdef) then
|
|
second_opordinal
|
|
else
|
|
if (cs_support_vectors in current_settings.globalswitches) and
|
|
is_vector(left.resultdef) then
|
|
second_opvector
|
|
{$ifdef SUPPORT_MMX}
|
|
else
|
|
if is_mmx_able_array(left.resultdef) then
|
|
second_opmmx
|
|
{$endif SUPPORT_MMX}
|
|
else
|
|
internalerror(200306016);
|
|
end;
|
|
floatdef :
|
|
second_opfloat;
|
|
else
|
|
second_opordinal;
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
caddnode:=tcgaddnode;
|
|
end.
|