mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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c4e8f091ec
refactored, so the WebAssembly-specific code generation code goes in the wasm in node descendant class. git-svn-id: branches/wasm@48178 -
1374 lines
66 KiB
ObjectPascal
1374 lines
66 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
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Generate generic assembler for in set/case labels
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgset;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,globals,constexp,symtype,
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node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
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type
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tcgsetelementnode = class(tsetelementnode)
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procedure pass_generate_code;override;
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end;
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Tsetpart=record
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range : boolean; {Part is a range.}
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start,stop : byte; {Start/stop when range; Stop=element when an element.}
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end;
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Tsetparts=array[1..8] of Tsetpart;
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{ tcginnode }
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tcginnode = class(tinnode)
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procedure in_smallset(opdef: tdef; setbase: aint); virtual;
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function pass_1: tnode;override;
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procedure pass_generate_code;override;
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protected
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function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
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function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
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end;
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tcgcasenode = class(tcasenode)
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{
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Emits the case node statement. Contrary to the intel
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80x86 version, this version does not emit jump tables,
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because of portability problems.
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}
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procedure pass_generate_code;override;
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protected
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with_sign : boolean;
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opsize : tdef;
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jmp_gt,jmp_lt,jmp_le : topcmp;
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{ register with case expression }
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hregister,hregister2 : tregister;
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endlabel,elselabel : tasmlabel;
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{ true, if we can omit the range check of the jump table }
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jumptable_no_range : boolean;
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{ has the implementation jumptable support }
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min_label : tconstexprint;
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function GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
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function blocklabel(id:longint):tasmlabel;
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procedure optimizevalues(var max_linear_list:int64;var max_dist:qword);virtual;
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function has_jumptable : boolean;virtual;
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procedure genjumptable(hp : pcaselabel;min_,max_ : int64); virtual;
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procedure genlinearlist(hp : pcaselabel); virtual;
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procedure genlinearcmplist(hp : pcaselabel); virtual;
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procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
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procedure genjmptree(root : pcaselabel); virtual;
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end;
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implementation
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uses
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verbose,
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cutils,
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symconst,symdef,symsym,defutil,
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pass_2,tgobj,
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nbas,ncon,ncgflw,
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{$ifdef WASM}
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hlcgcpu,aasmcpu,
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{$endif WASM}
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ncgutil,hlcgobj;
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{*****************************************************************************
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TCGSETELEMENTNODE
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*****************************************************************************}
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procedure tcgsetelementnode.pass_generate_code;
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begin
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{ load the set element's value }
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secondpass(left);
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{ also a second value ? }
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if assigned(right) then
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internalerror(2015111106);
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{ we don't modify the left side, we only check the location type; our
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parent node (an add-node) will use the resulting location to perform
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the set operation without creating an intermediate set }
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location_copy(location,left.location);
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end;
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{*****************************************************************************
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*****************************************************************************}
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function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
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var
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compares,maxcompares:word;
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i:byte;
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begin
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analizeset:=false;
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fillchar(setparts,sizeof(setparts),0);
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numparts:=0;
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compares:=0;
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{ Lots of comparisions take a lot of time, so do not allow
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too much comparisions. 8 comparisions are, however, still
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smalller than emitting the set }
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if cs_opt_size in current_settings.optimizerswitches then
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maxcompares:=8
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else
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maxcompares:=5;
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{ when smallset is possible allow only 3 compares the smallset
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code is for littlesize also smaller when more compares are used }
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if is_small then
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maxcompares:=3;
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for i:=0 to 255 do
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if i in Aset then
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begin
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if (numparts=0) or (i<>setparts[numparts].stop+1) then
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begin
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{Set element is a separate element.}
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inc(compares);
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if compares>maxcompares then
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exit;
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inc(numparts);
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setparts[numparts].range:=false;
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setparts[numparts].stop:=i;
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end
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else
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{Set element is part of a range.}
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if not setparts[numparts].range then
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begin
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{Transform an element into a range.}
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setparts[numparts].range:=true;
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setparts[numparts].start:=setparts[numparts].stop;
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setparts[numparts].stop:=i;
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{ there's only one compare per range anymore. Only a }
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{ sub is added, but that's much faster than a }
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{ cmp/jcc combo so neglect its effect }
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{ inc(compares);
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if compares>maxcompares then
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exit; }
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end
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else
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begin
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{Extend a range.}
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setparts[numparts].stop:=i;
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end;
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end;
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analizeset:=true;
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end;
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procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
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begin
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{ location is always LOC_REGISTER }
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location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
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{ allocate a register for the result }
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location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
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{**************************** SMALL SET **********************}
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if left.location.loc=LOC_CONSTANT then
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begin
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hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
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right.resultdef, resultdef,
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left.location.value-setbase, right.location,
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location.register);
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end
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else
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begin
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hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
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left.resultdef, opdef, true);
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register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
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setbase);
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hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
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right.resultdef, resultdef, left.location.register, right.location,
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location.register);
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end;
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end;
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function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
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begin
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{ check if we can use smallset operation using btl which is limited
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to 32 bits, the left side may also not contain higher values !! }
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use_small:=is_smallset(right.resultdef) and
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not is_signed(left.resultdef) and
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((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
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(left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
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{ Can we generate jumps? Possible for all types of sets }
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checkgenjumps:=(right.nodetype=setconstn) and
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analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
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end;
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function tcginnode.pass_1: tnode;
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var
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setparts: Tsetparts;
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numparts: byte;
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use_small: boolean;
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begin
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result := inherited pass_1;
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if not(assigned(result)) and
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checkgenjumps(setparts,numparts,use_small) then
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expectloc := LOC_JUMP;
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end;
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procedure tcginnode.pass_generate_code;
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var
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adjustment,
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setbase : {$ifdef CPU8BITALU}smallint{$else}aint{$endif};
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l, l2 : tasmlabel;
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hr,
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pleftreg : tregister;
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setparts : Tsetparts;
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opsize : tcgsize;
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opdef : tdef;
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uopsize : tcgsize;
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uopdef : tdef;
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orgopsize : tcgsize;
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genjumps,
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use_small : boolean;
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i,numparts : byte;
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needslabel : Boolean;
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begin
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l2:=nil;
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{ We check first if we can generate jumps, this can be done
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because the resultdef is already set in firstpass }
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genjumps := checkgenjumps(setparts,numparts,use_small);
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orgopsize := def_cgsize(left.resultdef);
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{$if defined(cpu8bitalu)}
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if (tsetdef(right.resultdef).setbase>=-128) and
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(tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=256) then
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begin
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uopsize := OS_8;
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uopdef := u8inttype;
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if is_signed(left.resultdef) then
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begin
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opsize := OS_S8;
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opdef := s8inttype;
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end
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else
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begin
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opsize := uopsize;
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opdef := uopdef;
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end;
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end
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{$endif defined(cpu8bitalu)}
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{$if defined(cpu8bitalu)}
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{ this should be also enabled for 16 bit CPUs, however, I have no proper testing facility for 16 bit, my
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testing results using Dosbox are no reliable }
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{ $if defined(cpu8bitalu) or defined(cpu16bitalu)}
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else if (tsetdef(right.resultdef).setbase>=-32768) and
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(tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=65536) then
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begin
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uopsize := OS_16;
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uopdef := u16inttype;
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if is_signed(left.resultdef) then
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begin
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opsize := OS_S16;
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opdef := s16inttype;
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end
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else
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begin
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opsize := uopsize;
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opdef := uopdef;
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end;
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end
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else
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{$endif defined(cpu8bitalu)}
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begin
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uopsize := OS_32;
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uopdef := u32inttype;
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if is_signed(left.resultdef) then
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begin
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opsize := OS_S32;
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opdef := s32inttype;
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end
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else
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begin
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opsize := uopsize;
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opdef := uopdef;
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end;
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end;
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needslabel := false;
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if not genjumps then
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{ calculate both operators }
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{ the complex one first }
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{ not in case of genjumps, because then we don't secondpass }
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{ right at all (so we have to make sure that "right" really is }
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{ "right" and not "swapped left" in that case) }
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firstcomplex(self);
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secondpass(left);
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if (left.expectloc=LOC_JUMP)<>
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(left.location.loc=LOC_JUMP) then
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internalerror(2007070101);
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{ Only process the right if we are not generating jumps }
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if not genjumps then
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secondpass(right);
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if codegenerror then
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exit;
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{ ofcourse not commutative }
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if nf_swapped in flags then
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swapleftright;
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setbase:=tsetdef(right.resultdef).setbase;
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if genjumps then
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begin
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{ location is always LOC_JUMP }
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current_asmdata.getjumplabel(l);
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current_asmdata.getjumplabel(l2);
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location_reset_jump(location,l,l2);
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{ If register is used, use only lower 8 bits }
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
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pleftreg := left.location.register;
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{ how much have we already substracted from the x in the }
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{ "x in [y..z]" expression }
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adjustment := 0;
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hr:=NR_NO;
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for i:=1 to numparts do
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if setparts[i].range then
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{ use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
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begin
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{ is the range different from all legal values? }
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if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
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begin
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{ yes, is the lower bound <> 0? }
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if (setparts[i].start <> 0) then
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{ we're going to substract from the left register, }
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{ so in case of a LOC_CREGISTER first move the value }
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{ to edi (not done before because now we can do the }
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{ move and substract in one instruction with LEA) }
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if (left.location.loc = LOC_CREGISTER) and
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(hr<>pleftreg) then
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begin
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{ don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
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hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
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hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
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pleftreg:=hr;
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end
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else
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begin
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{ otherwise, the value is already in a register }
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{ that can be modified }
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hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
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setparts[i].start-adjustment,pleftreg)
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end;
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{ new total value substracted from x: }
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{ adjustment + (setparts[i].start - adjustment) }
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adjustment := setparts[i].start;
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{ check if result < b-a+1 (not "result <= b-a", since }
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{ we need a carry in case the element is in the range }
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{ (this will never overflow since we check at the }
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{ beginning whether stop-start <> 255) }
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hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
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setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
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end
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else
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{ if setparts[i].start = 0 and setparts[i].stop = 255, }
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{ it's always true since "in" is only allowed for bytes }
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begin
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hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
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end;
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end
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else
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begin
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{ Emit code to check if left is an element }
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hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
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setparts[i].stop-adjustment,pleftreg,location.truelabel);
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end;
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{ To compensate for not doing a second pass }
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right.location.reference.symbol:=nil;
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hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
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end
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else
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{*****************************************************************}
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{ NO JUMP TABLE GENERATION }
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{*****************************************************************}
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begin
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{ We will now generated code to check the set itself, no jmps,
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handle smallsets separate, because it allows faster checks }
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if use_small then
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begin
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in_smallset(opdef, setbase);
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end
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else
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{************************** NOT SMALL SET ********************}
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begin
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{ location is always LOC_REGISTER }
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location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
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{ allocate a register for the result }
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location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
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if right.location.loc=LOC_CONSTANT then
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begin
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{ can it actually occur currently? CEC }
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{ yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
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{ note: this code assumes that left in [0..255], which is a valid }
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{ assumption (other cases will be caught by range checking) (JM) }
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{ load left in register }
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
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register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
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{ emit bit test operation -- warning: do not use
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location_force_reg() to force a set into a register, except
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to a register of the same size as the set. The reason is
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that on big endian systems, this would require moving the
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set to the most significant part of the new register,
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and location_force_register can't do that (it does not
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know the type).
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a_bit_test_reg_loc_reg() properly takes into account the
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size of the set to adjust the register index to test }
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hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
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uopdef,right.resultdef,uopdef,
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left.location.register,right.location,location.register);
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{ now zero the result if left > nr_of_bits_in_right_register }
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hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
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{ if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
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{ (left.location.size = location.size at this point) }
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hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
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hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
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{ if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
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hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
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end { of right.location.loc=LOC_CONSTANT }
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{ do search in a normal set which could have >32 elements
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but also used if the left side contains higher values > 32 }
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else if (left.location.loc=LOC_CONSTANT) then
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begin
|
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if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
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{should be caught earlier }
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internalerror(2007020402);
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|
|
hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
|
|
right.location,location.register);
|
|
end
|
|
else
|
|
begin
|
|
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
|
|
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
|
|
pleftreg := left.location.register;
|
|
|
|
if (opsize >= OS_S8) or { = if signed }
|
|
((left.resultdef.typ=orddef) and
|
|
((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
|
|
(torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
|
|
((left.resultdef.typ=enumdef) and
|
|
((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
|
|
(tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
|
|
begin
|
|
{$ifdef WASM}
|
|
needslabel := True;
|
|
|
|
thlcgwasm(hlcg).a_cmp_const_reg_stack(current_asmdata.CurrAsmList, opdef, OC_A, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg);
|
|
|
|
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_if));
|
|
thlcgwasm(hlcg).incblock;
|
|
thlcgwasm(hlcg).decstack(current_asmdata.CurrAsmList,1);
|
|
|
|
hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
|
|
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_else));
|
|
{$else WASM}
|
|
current_asmdata.getjumplabel(l);
|
|
current_asmdata.getjumplabel(l2);
|
|
needslabel := True;
|
|
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
|
|
|
|
hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
|
|
hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
|
|
|
|
hlcg.a_label(current_asmdata.CurrAsmList, l);
|
|
{$endif WASM}
|
|
end;
|
|
|
|
hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
|
|
pleftreg,right.location,location.register);
|
|
|
|
if needslabel then
|
|
begin
|
|
{$ifdef WASM}
|
|
current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_if));
|
|
thlcgwasm(hlcg).decblock;
|
|
{$else WASM}
|
|
hlcg.a_label(current_asmdata.CurrAsmList, l2);
|
|
{$endif WASM}
|
|
end
|
|
end;
|
|
{$ifndef cpuhighleveltarget}
|
|
location.size := def_cgsize(resultdef);
|
|
location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
|
|
{$else not cpuhighleveltarget}
|
|
hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
|
|
hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
|
|
location.register:=hr;
|
|
location.size := def_cgsize(resultdef);
|
|
{$endif not cpuhighleveltarget}
|
|
end;
|
|
end;
|
|
location_freetemp(current_asmdata.CurrAsmList, right.location);
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
TCGCASENODE
|
|
*****************************************************************************}
|
|
|
|
|
|
{ Analyse the nodes following the else label - if empty, change to end label }
|
|
function tcgcasenode.GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
|
|
var
|
|
LabelSym: TLabelSym;
|
|
begin
|
|
Result := True;
|
|
|
|
if not Assigned(Block) then
|
|
begin
|
|
{ Block doesn't exist / is empty }
|
|
_Label := endlabel;
|
|
Exit;
|
|
end;
|
|
|
|
{ These optimisations aren't particularly debugger friendly }
|
|
if not (cs_opt_level2 in current_settings.optimizerswitches) then
|
|
begin
|
|
Result := False;
|
|
current_asmdata.getjumplabel(_Label);
|
|
Exit;
|
|
end;
|
|
|
|
while Assigned(Block) do
|
|
begin
|
|
case Block.nodetype of
|
|
nothingn:
|
|
begin
|
|
_Label := endlabel;
|
|
Exit;
|
|
end;
|
|
goton:
|
|
begin
|
|
LabelSym := TCGGotoNode(Block).labelsym;
|
|
if not Assigned(LabelSym) then
|
|
InternalError(2018121131);
|
|
|
|
_Label := TCGLabelNode(TCGGotoNode(Block).labelnode).getasmlabel;
|
|
if Assigned(_Label) then
|
|
{ Keep tabs on the fact that an actual 'goto' was used }
|
|
Include(flowcontrol,fc_gotolabel)
|
|
else
|
|
Break;
|
|
Exit;
|
|
end;
|
|
blockn:
|
|
begin
|
|
Block := TBlockNode(Block).Left;
|
|
Continue;
|
|
end;
|
|
statementn:
|
|
begin
|
|
{ If the right node is assigned, then it's a compound block
|
|
that can't be simplified, so fall through, set Result to
|
|
False and make a new label }
|
|
|
|
if Assigned(TStatementNode(Block).right) then
|
|
Break;
|
|
|
|
Block := TStatementNode(Block).Left;
|
|
Continue;
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
|
|
Break;
|
|
end;
|
|
|
|
{ Create unique label }
|
|
Result := False;
|
|
current_asmdata.getjumplabel(_Label);
|
|
end;
|
|
|
|
|
|
function tcgcasenode.blocklabel(id:longint):tasmlabel;
|
|
begin
|
|
if not assigned(blocks[id]) then
|
|
internalerror(200411301);
|
|
result:=pcaseblock(blocks[id])^.blocklabel;
|
|
end;
|
|
|
|
|
|
procedure tcgcasenode.optimizevalues(var max_linear_list:int64;var max_dist:qword);
|
|
begin
|
|
{ no changes by default }
|
|
end;
|
|
|
|
|
|
function tcgcasenode.has_jumptable : boolean;
|
|
begin
|
|
{ No jumptable support in the default implementation }
|
|
has_jumptable:=false;
|
|
end;
|
|
|
|
|
|
procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : int64);
|
|
begin
|
|
internalerror(200209161);
|
|
end;
|
|
|
|
|
|
procedure tcgcasenode.genlinearlist(hp : pcaselabel);
|
|
|
|
var
|
|
first : boolean;
|
|
last : TConstExprInt;
|
|
scratch_reg: tregister;
|
|
newsize: tcgsize;
|
|
newdef: tdef;
|
|
|
|
procedure gensub(value:tcgint);
|
|
begin
|
|
{ here, since the sub and cmp are separate we need
|
|
to move the result before subtract to help
|
|
the register allocator
|
|
}
|
|
hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
|
|
hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
|
|
end;
|
|
|
|
|
|
procedure genitem(t : pcaselabel);
|
|
|
|
begin
|
|
if assigned(t^.less) then
|
|
genitem(t^.less);
|
|
{ do we need to test the first value? }
|
|
if first and (t^._low>get_min_value(left.resultdef)) then
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
|
|
if t^._low=t^._high then
|
|
begin
|
|
if t^._low-last=0 then
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
|
|
else
|
|
begin
|
|
gensub(tcgint(t^._low.svalue-last.svalue));
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
|
|
OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
|
|
end;
|
|
last:=t^._low;
|
|
end
|
|
else
|
|
begin
|
|
{ it begins with the smallest label, if the value }
|
|
{ is even smaller then jump immediately to the }
|
|
{ ELSE-label }
|
|
if first then
|
|
begin
|
|
{ have we to ajust the first value ? }
|
|
if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
|
|
gensub(tcgint(t^._low.svalue));
|
|
end
|
|
else
|
|
begin
|
|
{ if there is no unused label between the last and the }
|
|
{ present label then the lower limit can be checked }
|
|
{ immediately. else check the range in between: }
|
|
gensub(tcgint(t^._low.svalue-last.svalue));
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
|
|
end;
|
|
gensub(tcgint(t^._high.svalue-t^._low.svalue));
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
|
|
last:=t^._high;
|
|
end;
|
|
first:=false;
|
|
if assigned(t^.greater) then
|
|
genitem(t^.greater);
|
|
end;
|
|
|
|
begin
|
|
{ do we need to generate cmps? }
|
|
if (with_sign and (min_label<0)) then
|
|
genlinearcmplist(hp)
|
|
else
|
|
begin
|
|
{ sign/zero extend the value to a full register before starting to
|
|
subtract values, so that on platforms that don't have
|
|
subregisters of the same size as the value we don't generate
|
|
sign/zero-extensions after every subtraction
|
|
|
|
make newsize always signed, since we only do this if the size in
|
|
bytes of the register is larger than the original opsize, so
|
|
the value can always be represented by a larger signed type }
|
|
newsize:=tcgsize2signed[reg_cgsize(hregister)];
|
|
if tcgsize2size[newsize]>opsize.size then
|
|
begin
|
|
newdef:=cgsize_orddef(newsize);
|
|
scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
|
|
hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
|
|
hregister:=scratch_reg;
|
|
opsize:=newdef;
|
|
end;
|
|
if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
|
|
begin
|
|
last:=0;
|
|
first:=true;
|
|
scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
|
|
genitem(hp);
|
|
end
|
|
else
|
|
begin
|
|
{ If only one label exists, we can greatly simplify the checks to a simple comparison }
|
|
if hp^._low=hp^._high then
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, blocklabel(hp^.blockid))
|
|
else
|
|
begin
|
|
scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
|
|
gensub(tcgint(hp^._low.svalue));
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, blocklabel(hp^.blockid))
|
|
end;
|
|
end;
|
|
hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
|
|
|
|
var
|
|
last : TConstExprInt;
|
|
lastwasrange: boolean;
|
|
|
|
procedure genitem(t : pcaselabel);
|
|
|
|
{$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
|
|
var
|
|
l1 : tasmlabel;
|
|
{$endif not cpu64bitalu and not cpuhighleveltarget}
|
|
|
|
begin
|
|
if assigned(t^.less) then
|
|
genitem(t^.less);
|
|
if t^._low=t^._high then
|
|
begin
|
|
{$ifndef cpuhighleveltarget}
|
|
{$if defined(cpu32bitalu)}
|
|
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$elseif defined(cpu16bitalu)}
|
|
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_S32,OS_32] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$elseif defined(cpu8bitalu)}
|
|
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_S32,OS_32] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_S16,OS_16] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$endif}
|
|
{$endif cpuhighleveltarget}
|
|
begin
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, blocklabel(t^.blockid));
|
|
end;
|
|
{ Reset last here, because we've only checked for one value and need to compare
|
|
for the next range both the lower and upper bound }
|
|
lastwasrange := false;
|
|
end
|
|
else
|
|
begin
|
|
{ it begins with the smallest label, if the value }
|
|
{ is even smaller then jump immediately to the }
|
|
{ ELSE-label }
|
|
if not lastwasrange or (t^._low-last>1) then
|
|
begin
|
|
{$ifndef cpuhighleveltarget}
|
|
{$if defined(cpu32bitalu)}
|
|
if def_cgsize(opsize) in [OS_64,OS_S64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
|
|
hregister2, elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
|
|
hregister2, l1);
|
|
{ the comparisation of the low dword must be always unsigned! }
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$elseif defined(cpu16bitalu)}
|
|
if def_cgsize(opsize) in [OS_64,OS_S64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
|
|
cg.GetNextReg(hregister2), elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
|
|
cg.GetNextReg(hregister2), l1);
|
|
{ the comparison of the low words must be always unsigned! }
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
|
|
hregister2, elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
|
|
hregister2, l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
|
|
cg.GetNextReg(hregister), elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
|
|
cg.GetNextReg(hregister), l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_32,OS_S32] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
|
|
cg.GetNextReg(hregister), elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
|
|
cg.GetNextReg(hregister), l1);
|
|
{ the comparisation of the low dword must be always unsigned! }
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$elseif defined(cpu8bitalu)}
|
|
if def_cgsize(opsize) in [OS_64,OS_S64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
|
|
{ the comparison of the low words must be always unsigned! }
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_32,OS_S32] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
|
|
{ the comparison of the low words must be always unsigned! }
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_16,OS_S16] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
|
|
{ the comparisation of the low dword must be always unsigned! }
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$endif}
|
|
{$endif cpuhighleveltarget}
|
|
begin
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister,
|
|
elselabel);
|
|
end;
|
|
end;
|
|
{$ifndef cpuhighleveltarget}
|
|
{$if defined(cpu32bitalu)}
|
|
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
|
|
blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
|
|
l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$elseif defined(cpu16bitalu)}
|
|
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
|
|
blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
|
|
l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
|
|
blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
|
|
l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
|
|
blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
|
|
l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_S32,OS_32] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
|
|
blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
|
|
l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$elseif defined(cpu8bitalu)}
|
|
if def_cgsize(opsize) in [OS_S64,OS_64] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_S32,OS_32] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else if def_cgsize(opsize) in [OS_S16,OS_16] then
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end
|
|
else
|
|
{$endif}
|
|
{$endif cpuhighleveltarget}
|
|
begin
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, blocklabel(t^.blockid));
|
|
end;
|
|
|
|
last:=t^._high;
|
|
lastwasrange := true;
|
|
end;
|
|
if assigned(t^.greater) then
|
|
genitem(t^.greater);
|
|
end;
|
|
|
|
begin
|
|
last:=0;
|
|
lastwasrange:=false;
|
|
genitem(hp);
|
|
hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
|
|
end;
|
|
|
|
|
|
procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
|
|
var
|
|
lesslabel,greaterlabel : tasmlabel;
|
|
begin
|
|
current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
|
|
cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
|
|
|
|
{ calculate labels for left and right }
|
|
if p^.less=nil then
|
|
lesslabel:=elselabel
|
|
else
|
|
lesslabel:=p^.less^.labellabel;
|
|
if p^.greater=nil then
|
|
greaterlabel:=elselabel
|
|
else
|
|
greaterlabel:=p^.greater^.labellabel;
|
|
|
|
{ calculate labels for left and right }
|
|
{ no range label: }
|
|
if p^._low=p^._high then
|
|
begin
|
|
if greaterlabel=lesslabel then
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel)
|
|
else
|
|
begin
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
|
|
end;
|
|
hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
|
|
end
|
|
else
|
|
begin
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
|
|
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
|
|
hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
|
|
end;
|
|
if assigned(p^.less) then
|
|
genjmptreeentry(p^.less,p^._low);
|
|
if assigned(p^.greater) then
|
|
genjmptreeentry(p^.greater,p^._high);
|
|
end;
|
|
|
|
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|
procedure tcgcasenode.genjmptree(root : pcaselabel);
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type
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tlabelarrayentry = record
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caselabel : pcaselabel;
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asmlabel : TAsmLabel;
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end;
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tlabelarray = array of tlabelarrayentry;
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var
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labelarray : tlabelarray;
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var
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nextarrayentry : int64;
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i : longint;
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procedure addarrayentry(entry : pcaselabel);
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begin
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if assigned(entry^.less) then
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addarrayentry(entry^.less);
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with labelarray[nextarrayentry] do
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begin
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caselabel:=entry;
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current_asmdata.getjumplabel(asmlabel);
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end;
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inc(nextarrayentry);
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if assigned(entry^.greater) then
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addarrayentry(entry^.greater);
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end;
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{ rebuild the label tree balanced }
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procedure rebuild(first,last : int64;var p : pcaselabel);
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var
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current : int64;
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begin
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current:=(first+last) div 2;
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p:=labelarray[current].caselabel;
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if first<current then
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rebuild(first,current-1,p^.less)
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else
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p^.less:=nil;
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if last>current then
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rebuild(current+1,last,p^.greater)
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else
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p^.greater:=nil;
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end;
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begin
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labelarray:=nil;
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SetLength(labelarray,labelcnt);
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nextarrayentry:=0;
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addarrayentry(root);
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rebuild(0,high(labelarray),root);
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for i:=0 to high(labelarray) do
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current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
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genjmptreeentry(root,root^._high+10);
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end;
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procedure tcgcasenode.pass_generate_code;
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var
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oldflowcontrol: tflowcontrol;
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i : longint;
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dist : asizeuint;
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distv,
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lv,hv,
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max_label: tconstexprint;
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max_linear_list : int64;
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max_dist : qword;
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ShortcutElse: Boolean;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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oldflowcontrol := flowcontrol;
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include(flowcontrol,fc_inflowcontrol);
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{ Allocate labels }
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current_asmdata.getjumplabel(endlabel);
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{ Do some optimisation to deal with empty else blocks }
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ShortcutElse := GetBranchLabel(elseblock, elselabel);
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for i:=0 to blocks.count-1 do
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with pcaseblock(blocks[i])^ do
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shortcut := GetBranchLabel(statement, blocklabel);
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with_sign:=is_signed(left.resultdef);
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if with_sign then
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begin
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jmp_gt:=OC_GT;
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jmp_lt:=OC_LT;
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jmp_le:=OC_LTE;
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end
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else
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begin
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jmp_gt:=OC_A;
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jmp_lt:=OC_B;
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jmp_le:=OC_BE;
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end;
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secondpass(left);
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if (left.expectloc=LOC_JUMP)<>
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(left.location.loc=LOC_JUMP) then
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internalerror(2006050501);
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{ determines the size of the operand }
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opsize:=left.resultdef;
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{ copy the case expression to a register }
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
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{$if not defined(cpu64bitalu)}
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if def_cgsize(opsize) in [OS_S64,OS_64] then
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begin
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hregister:=left.location.register64.reglo;
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hregister2:=left.location.register64.reghi;
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end
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else
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{$endif not cpu64bitalu and not cpuhighleveltarget}
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hregister:=left.location.register;
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{ we need the min_label always to choose between }
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{ cmps and subs/decs }
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min_label:=case_get_min(labels);
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{ Generate the jumps }
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{$ifdef OLDREGVARS}
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load_all_regvars(current_asmdata.CurrAsmList);
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{$endif OLDREGVARS}
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{$if not defined(cpu64bitalu)}
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if def_cgsize(opsize) in [OS_64,OS_S64] then
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genlinearcmplist(labels)
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else
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{$endif not cpu64bitalu and not cpuhighleveltarget}
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begin
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if cs_opt_level1 in current_settings.optimizerswitches then
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begin
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{ procedures are empirically passed on }
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{ consumption can also be calculated }
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{ but does it pay on the different }
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{ processors? }
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{ moreover can the size only be appro- }
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{ ximated as it is not known if rel8, }
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{ rel16 or rel32 jumps are used }
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max_label := case_get_max(labels);
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{ can we omit the range check of the jump table ? }
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getrange(left.resultdef,lv,hv);
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jumptable_no_range:=(lv=min_label) and (hv=max_label);
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distv:=max_label-min_label;
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if distv>=0 then
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dist:=distv.uvalue
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else
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dist:=asizeuint(-distv.svalue);
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{ optimize for size ? }
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if cs_opt_size in current_settings.optimizerswitches then
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begin
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if has_jumptable and
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(min_label>=int64(low(aint))) and
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(max_label<=high(aint)) and
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not((labelcnt<=2) or
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(distv.svalue<0) or
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(dist>3*labelcnt)) then
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begin
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{ if the labels less or more a continuum then }
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genjumptable(labels,min_label.svalue,max_label.svalue);
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end
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else
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begin
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{ a linear list is always smaller than a jump tree }
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genlinearlist(labels);
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end;
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end
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else
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begin
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max_dist:=4*labelcoverage;
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{ Don't allow jump tables to get too large }
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if max_dist>4*labelcnt then
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max_dist:=min(max_dist,2048);
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if jumptable_no_range then
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max_linear_list:=4
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else
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max_linear_list:=2;
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{ allow processor specific values }
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optimizevalues(max_linear_list,max_dist);
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if (labelcnt<=max_linear_list) then
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genlinearlist(labels)
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else
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begin
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if (has_jumptable) and
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(dist<max_dist) and
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(min_label>=int64(low(aint))) and
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(max_label<=high(aint)) then
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genjumptable(labels,min_label.svalue,max_label.svalue)
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{ value has been determined on an i7-4770 using a random case with random values
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if more values are known, this can be handled depending on the target CPU
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Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
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a good value }
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else if labelcnt>=64 then
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genjmptree(labels)
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else
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genlinearlist(labels);
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end;
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end;
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end
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else
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{ it's always not bad }
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genlinearlist(labels);
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end;
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{ generate the instruction blocks }
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for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
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begin
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{ If the labels are not equal, then the block label has been shortcut to point elsewhere,
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so there's no need to implement it }
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if not shortcut then
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begin
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current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
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cg.a_label(current_asmdata.CurrAsmList,blocklabel);
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secondpass(statement);
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{ don't come back to case line }
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current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
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{$ifdef OLDREGVARS}
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load_all_regvars(current_asmdata.CurrAsmList);
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{$endif OLDREGVARS}
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hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
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end;
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end;
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{ ...and the else block }
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if not ShortcutElse then
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begin
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current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
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hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
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end;
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if Assigned(elseblock) then
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begin
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secondpass(elseblock);
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{$ifdef OLDREGVARS}
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load_all_regvars(current_asmdata.CurrAsmList);
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{$endif OLDREGVARS}
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end;
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current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
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hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
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{ Reset labels }
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for i:=0 to blocks.count-1 do
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pcaseblock(blocks[i])^.blocklabel:=nil;
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flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
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end;
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begin
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csetelementnode:=tcgsetelementnode;
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cinnode:=tcginnode;
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ccasenode:=tcgcasenode;
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end.
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