nickysn ae92973196 + added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and ... retfq x86 instructions. These are variants of the ret instruction with the return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a 32-bit offset, followed by a 16-bit segment), etc. git-svn-id: trunk@37571 -		2017-11-10 16:53:29 +00:00
..
aoptcpu.pas	* i386 building fixed	2017-11-04 19:42:08 +00:00
aoptcpub.pas	* i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same	2016-04-21 20:14:01 +00:00
aoptcpud.pas	* i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same	2016-04-21 20:14:01 +00:00
cgcpu.pas	* fix compilation with -Cr	2017-05-21 08:34:42 +00:00
cpubase.inc
cpuelf.pas	Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).	2014-12-14 16:28:35 +00:00
cpuinfo.pas	+ added CPUX86_HAS_SSE2 to x86 tcpuflags	2017-09-26 16:02:56 +00:00
cpunode.pas	* automatically generate necessary indirect symbols when a new assembler	2016-07-20 20:53:03 +00:00
cpupara.pas	* use pocalls_cdecl and cstylearrayofconst more consistently instead of	2017-02-25 11:46:35 +00:00
cpupi.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cputarg.pas	merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run.	2014-08-17 18:18:07 +00:00
hlcgcpu.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
i386att.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
i386atts.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
i386int.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
i386nop.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
i386op.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
i386prop.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
i386tab.inc	+ added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and	2017-11-10 16:53:29 +00:00
n386add.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
n386cal.pas	syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed	2016-12-02 09:29:09 +00:00
n386flw.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
n386inl.pas	+ fast and branchless implementation of abs(int64) for i386	2017-09-10 17:25:47 +00:00
n386ld.pas	* factored out the loading of threadvars in its own method, and put the	2015-09-12 23:32:53 +00:00
n386mat.pas	* use TEST CL,32 instead of TEST ECX,32 in the beginning of a 64-bit shl/shr	2017-04-19 21:30:31 +00:00
n386mem.pas
n386set.pas
r386ari.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386att.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386con.inc	Regenerate register include files after commit 37564: Fix value of NR_DR6 and NR_DR7	2017-11-07 07:30:42 +00:00
r386dwrf.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386int.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386iri.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386nasm.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386nor.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386nri.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386num.inc	Regenerate register include files after commit 37564: Fix value of NR_DR6 and NR_DR7	2017-11-07 07:30:42 +00:00
r386ot.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386rni.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386sri.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386stab.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
r386std.inc	+ added individual bits of the x86 flags register as subregisters	2017-04-26 13:52:52 +00:00
ra386att.pas
ra386int.pas
rgcpu.pas
symcpu.pas	* changed getpointerdef() into a tpointerdef.getreusable() class method	2015-06-22 08:17:49 +00:00