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03880c2f74
Fixed multiplication code generation for AVR controllers without mul instructions. Added handling of the old interrupt procedure directive such that procedures with that use RETI instead of RET. git-svn-id: trunk@31030 -
679 lines
27 KiB
ObjectPascal
679 lines
27 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
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Development Team
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This unit implements the ARM optimizer object
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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Unit aoptcpu;
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{$i fpcdefs.inc}
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Interface
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uses cpubase, cgbase, aasmtai, aopt, aoptcpub;
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Type
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TCpuAsmOptimizer = class(TAsmOptimizer)
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Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
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function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
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{ uses the same constructor as TAopObj }
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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procedure PeepHoleOptPass2;override;
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End;
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Implementation
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uses
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cutils,
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cpuinfo,
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aasmbase,aasmcpu,aasmdata,
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globals,globtype,
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cgutils;
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type
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TAsmOpSet = set of TAsmOp;
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function CanBeCond(p : tai) : boolean;
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begin
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result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
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end;
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function RefsEqual(const r1, r2: treference): boolean;
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begin
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refsequal :=
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(r1.offset = r2.offset) and
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(r1.base = r2.base) and
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(r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
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(r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
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(r1.relsymbol = r2.relsymbol) and
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(r1.addressmode = r2.addressmode);
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end;
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function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
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begin
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result:=oper1.typ=oper2.typ;
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if result then
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case oper1.typ of
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top_const:
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Result:=oper1.val = oper2.val;
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top_reg:
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Result:=oper1.reg = oper2.reg;
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top_ref:
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Result:=RefsEqual(oper1.ref^, oper2.ref^);
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else Result:=false;
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end
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end;
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function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
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begin
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result := (oper.typ = top_reg) and (oper.reg = reg);
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end;
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function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
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begin
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result :=
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(instr.typ = ait_instruction) and
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(taicpu(instr).opcode = op);
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end;
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function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
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begin
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result :=
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(instr.typ = ait_instruction) and
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(taicpu(instr).opcode in ops);
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end;
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function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
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begin
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If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
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((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
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Result:=true
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else
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Result:=inherited RegInInstruction(Reg, p1);
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end;
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function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
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var Next: tai; reg: TRegister): Boolean;
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begin
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Next:=Current;
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repeat
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Result:=GetNextInstruction(Next,Next);
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until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
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(is_calljmp(taicpu(Next).opcode));
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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hp1,hp2,hp3,hp4,hp5: tai;
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alloc, dealloc: tai_regalloc;
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i: integer;
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l: TAsmLabel;
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begin
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result := false;
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case p.typ of
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ait_instruction:
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begin
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{
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change
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<op> reg,x,y
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cp reg,r1
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into
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<op>s reg,x,y
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}
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{ this optimization can applied only to the currently enabled operations because
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the other operations do not update all flags and FPC does not track flag usage }
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if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
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A_INC,A_LSL,A_LSR,
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A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
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GetNextInstruction(p, hp1) and
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MatchInstruction(hp1, A_CP) and
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(taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
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(taicpu(hp1).oper[1]^.reg = NR_R1) and
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GetNextInstruction(hp1, hp2) and
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{ be careful here, following instructions could use other flags
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however after a jump fpc never depends on the value of flags }
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{ All above instructions set Z and N according to the following
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Z := result = 0;
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N := result[31];
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EQ = Z=1; NE = Z=0;
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MI = N=1; PL = N=0; }
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MatchInstruction(hp2, A_BRxx) and
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(taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) { and
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no flag allocation tracking implemented yet on avr
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assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
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begin
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{ move flag allocation if possible }
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{ no flag allocation tracking implemented yet on avr
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GetLastInstruction(hp1, hp2);
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hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
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if assigned(hp2) then
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begin
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asml.Remove(hp2);
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asml.insertbefore(hp2, p);
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end;
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}
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asml.remove(hp1);
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hp1.free;
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Result:=true;
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end
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else
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case taicpu(p).opcode of
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A_LDI:
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begin
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{ turn
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ldi reg0, imm
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cp reg1, reg0
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dealloc reg0
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into
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cpi reg1, imm
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}
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if (taicpu(p).ops=2) and
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(taicpu(p).oper[0]^.typ=top_reg) and
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(taicpu(p).oper[1]^.typ=top_const) and
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GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
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(hp1.typ=ait_instruction) and
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(not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
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(taicpu(hp1).opcode=A_CP) and
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(taicpu(hp1).ops=2) and
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(taicpu(hp1).oper[1]^.typ=top_reg) and
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(getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
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(taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
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assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
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begin
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taicpu(hp1).opcode:=A_CPI;
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taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
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alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
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dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
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if assigned(alloc) and assigned(dealloc) then
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begin
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asml.Remove(alloc);
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alloc.Free;
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asml.Remove(dealloc);
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dealloc.Free;
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end;
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GetNextInstruction(p,hp1);
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asml.Remove(p);
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p.Free;
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p:=hp1;
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result:=true;
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end;
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end;
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A_STS:
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if (taicpu(p).oper[0]^.ref^.symbol=nil) and
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(taicpu(p).oper[0]^.ref^.relsymbol=nil) and
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(getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
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(getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
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(taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
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(taicpu(p).oper[0]^.ref^.offset>=32) and
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(taicpu(p).oper[0]^.ref^.offset<=95) then
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begin
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taicpu(p).opcode:=A_OUT;
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taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
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end;
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A_LDS:
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if (taicpu(p).oper[1]^.ref^.symbol=nil) and
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(taicpu(p).oper[1]^.ref^.relsymbol=nil) and
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(getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
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(getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
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(taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
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(taicpu(p).oper[1]^.ref^.offset>=32) and
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(taicpu(p).oper[1]^.ref^.offset<=95) then
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begin
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taicpu(p).opcode:=A_IN;
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taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
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end;
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A_IN:
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if GetNextInstruction(p,hp1) then
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begin
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{
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in rX,Y
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ori rX,n
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out Y,rX
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into
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sbi rX,lg(n)
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}
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if (taicpu(p).oper[1]^.val<=31) and
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MatchInstruction(hp1,A_ORI) and
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(taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
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(PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
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GetNextInstruction(hp1,hp2) and
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MatchInstruction(hp2,A_OUT) and
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MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
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MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
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begin
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taicpu(p).opcode:=A_SBI;
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taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
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taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
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asml.Remove(hp1);
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hp1.Free;
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asml.Remove(hp2);
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hp2.Free;
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result:=true;
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end
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{
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in rX,Y
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andi rX,not(n)
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out Y,rX
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into
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cbi rX,lg(n)
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}
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else if (taicpu(p).oper[1]^.val<=31) and
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MatchInstruction(hp1,A_ANDI) and
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(taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
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(PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
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GetNextInstruction(hp1,hp2) and
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MatchInstruction(hp2,A_OUT) and
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MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
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MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
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begin
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taicpu(p).opcode:=A_CBI;
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taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
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taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
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asml.Remove(hp1);
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hp1.Free;
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asml.Remove(hp2);
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hp2.Free;
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result:=true;
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end
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{
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in rX,Y
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andi rX,n
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breq/brne L1
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into
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sbis/sbic Y,lg(n)
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jmp L1
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.Ltemp:
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}
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else if (taicpu(p).oper[1]^.val<=31) and
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MatchInstruction(hp1,A_ANDI) and
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(taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
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(PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
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GetNextInstruction(hp1,hp2) and
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MatchInstruction(hp2,A_BRxx) and
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(taicpu(hp2).condition in [C_EQ,C_NE]) then
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begin
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if taicpu(hp2).condition=C_EQ then
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taicpu(p).opcode:=A_SBIS
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else
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taicpu(p).opcode:=A_SBIC;
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taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
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taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
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asml.Remove(hp1);
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hp1.Free;
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taicpu(hp2).condition:=C_None;
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if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
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taicpu(hp2).opcode:=A_JMP
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else
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taicpu(hp2).opcode:=A_RJMP;
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current_asmdata.getjumplabel(l);
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l.increfs;
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asml.InsertAfter(tai_label.create(l), hp2);
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result:=true;
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end;
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end;
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A_CLR:
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begin
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{ turn the common
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clr rX
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mov/ld rX, rY
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into
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mov/ld rX, rY
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}
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if (taicpu(p).ops=1) and
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(taicpu(p).oper[0]^.typ=top_reg) and
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GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
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(hp1.typ=ait_instruction) and
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(taicpu(hp1).opcode in [A_MOV,A_LD]) and
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(taicpu(hp1).ops>0) and
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(taicpu(hp1).oper[0]^.typ=top_reg) and
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(taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
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begin
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asml.Remove(p);
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p.Free;
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p:=hp1;
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result:=true;
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end
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{ turn
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clr rX
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...
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adc rY, rX
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into
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...
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adc rY, r1
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}
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else if (taicpu(p).ops=1) and
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(taicpu(p).oper[0]^.typ=top_reg) and
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GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
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(hp1.typ=ait_instruction) and
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(taicpu(hp1).opcode in [A_ADC,A_SBC]) and
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(taicpu(hp1).ops=2) and
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(taicpu(hp1).oper[1]^.typ=top_reg) and
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(taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
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(taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
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assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
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begin
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taicpu(hp1).oper[1]^.reg:=NR_R1;
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alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
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dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
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if assigned(alloc) and assigned(dealloc) then
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begin
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asml.Remove(alloc);
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alloc.Free;
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asml.Remove(dealloc);
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dealloc.Free;
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end;
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GetNextInstruction(p,hp1);
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asml.Remove(p);
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p.free;
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p:=hp1;
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result:=true;
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end;
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end;
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A_PUSH:
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begin
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{ turn
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push reg0
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push reg1
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pop reg3
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pop reg2
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into
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movw reg2,reg0
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}
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if (taicpu(p).ops=1) and
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(taicpu(p).oper[0]^.typ=top_reg) and
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GetNextInstruction(p,hp1) and
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(hp1.typ=ait_instruction) and
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(taicpu(hp1).opcode=A_PUSH) and
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(getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
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((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
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GetNextInstruction(hp1,hp2) and
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(hp2.typ=ait_instruction) and
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(taicpu(hp2).opcode=A_POP) and
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GetNextInstruction(hp2,hp3) and
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(hp3.typ=ait_instruction) and
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(taicpu(hp3).opcode=A_POP) and
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(getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
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((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
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begin
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taicpu(p).ops:=2;
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taicpu(p).opcode:=A_MOVW;
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taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
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taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
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asml.Remove(hp1);
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hp1.Free;
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asml.Remove(hp2);
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hp2.Free;
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asml.Remove(hp3);
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hp3.Free;
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result:=true;
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end;
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end;
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A_MOV:
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begin
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{ turn
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mov reg0, reg1
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push reg0
|
|
dealloc reg0
|
|
into
|
|
push reg1
|
|
}
|
|
if (taicpu(p).ops=2) and
|
|
(taicpu(p).oper[0]^.typ = top_reg) and
|
|
(taicpu(p).oper[1]^.typ = top_reg) and
|
|
GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
|
|
(not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
|
|
(hp1.typ = ait_instruction) and
|
|
(taicpu(hp1).opcode in [A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_EOR,A_AND,A_OR]) and
|
|
RegInInstruction(taicpu(p).oper[0]^.reg, hp1) and
|
|
(not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
|
|
{(taicpu(hp1).ops=1) and
|
|
(taicpu(hp1).oper[0]^.typ = top_reg) and
|
|
(taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
|
|
assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
|
|
begin
|
|
for i := 0 to taicpu(hp1).ops-1 do
|
|
if taicpu(hp1).oper[i]^.typ=top_reg then
|
|
if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
|
|
taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
|
|
|
|
alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
|
|
dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
|
|
|
|
if assigned(alloc) and assigned(dealloc) then
|
|
begin
|
|
asml.Remove(alloc);
|
|
alloc.Free;
|
|
asml.Remove(dealloc);
|
|
dealloc.Free;
|
|
end;
|
|
|
|
GetNextInstruction(p,hp1);
|
|
asml.Remove(p);
|
|
p.free;
|
|
p:=hp1;
|
|
result:=true;
|
|
end
|
|
{ remove
|
|
mov reg0,reg0
|
|
}
|
|
else if (taicpu(p).ops=2) and
|
|
(taicpu(p).oper[0]^.typ = top_reg) and
|
|
(taicpu(p).oper[1]^.typ = top_reg) and
|
|
(taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
|
|
begin
|
|
GetNextInstruction(p,hp1);
|
|
asml.remove(p);
|
|
p.free;
|
|
p:=hp1;
|
|
result:=true;
|
|
end
|
|
{ fold
|
|
mov reg2,reg0
|
|
mov reg3,reg1
|
|
to
|
|
movw reg2,reg0
|
|
}
|
|
else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
|
|
(taicpu(p).ops=2) and
|
|
(taicpu(p).oper[0]^.typ = top_reg) and
|
|
(taicpu(p).oper[1]^.typ = top_reg) and
|
|
getnextinstruction(p,hp1) and
|
|
(hp1.typ = ait_instruction) and
|
|
(taicpu(hp1).opcode = A_MOV) and
|
|
(taicpu(hp1).ops=2) and
|
|
(taicpu(hp1).oper[0]^.typ = top_reg) and
|
|
(taicpu(hp1).oper[1]^.typ = top_reg) and
|
|
(getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
|
|
((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
|
|
((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
|
|
(getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
|
|
begin
|
|
alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
|
|
if assigned(alloc) then
|
|
begin
|
|
asml.Remove(alloc);
|
|
asml.InsertBefore(alloc,p);
|
|
end;
|
|
|
|
taicpu(p).opcode:=A_MOVW;
|
|
asml.remove(hp1);
|
|
hp1.free;
|
|
result:=true;
|
|
end
|
|
{
|
|
This removes the first mov from
|
|
mov rX,...
|
|
mov rX,...
|
|
}
|
|
else if taicpu(hp1).opcode=A_MOV then
|
|
while (hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_MOV) and
|
|
MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
|
|
{ don't remove the first mov if the second is a mov rX,rX }
|
|
not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
|
|
begin
|
|
asml.remove(p);
|
|
p.free;
|
|
p:=hp1;
|
|
GetNextInstruction(hp1,hp1);
|
|
result:=true;
|
|
if not assigned(hp1) then
|
|
break;
|
|
end;
|
|
end;
|
|
A_SBIC,
|
|
A_SBIS:
|
|
begin
|
|
{
|
|
Turn
|
|
sbic/sbis X, y
|
|
jmp .L1
|
|
op
|
|
.L1:
|
|
|
|
into
|
|
sbis/sbic X,y
|
|
op
|
|
.L1:
|
|
}
|
|
if GetNextInstruction(p, hp1) and
|
|
(hp1.typ=ait_instruction) and
|
|
(taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
|
|
(taicpu(hp1).ops>0) and
|
|
(taicpu(hp1).oper[0]^.typ = top_ref) and
|
|
(taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
|
|
GetNextInstruction(hp1, hp2) and
|
|
(hp2.typ=ait_instruction) and
|
|
(not taicpu(hp2).is_jmp) and
|
|
GetNextInstruction(hp2, hp3) and
|
|
(hp3.typ=ait_label) and
|
|
(taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
|
|
begin
|
|
if taicpu(p).opcode=A_SBIC then
|
|
taicpu(p).opcode:=A_SBIS
|
|
else
|
|
taicpu(p).opcode:=A_SBIC;
|
|
|
|
tai_label(hp3).labsym.decrefs;
|
|
|
|
AsmL.remove(hp1);
|
|
taicpu(hp1).Free;
|
|
|
|
result:=true;
|
|
end
|
|
{
|
|
Turn
|
|
sbiX X, y
|
|
jmp .L1
|
|
jmp .L2
|
|
.L1:
|
|
op
|
|
.L2:
|
|
|
|
into
|
|
sbiX X,y
|
|
.L1:
|
|
op
|
|
.L2:
|
|
}
|
|
else if GetNextInstruction(p, hp1) and
|
|
(hp1.typ=ait_instruction) and
|
|
(taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
|
|
(taicpu(hp1).ops>0) and
|
|
(taicpu(hp1).oper[0]^.typ = top_ref) and
|
|
(taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
|
|
|
|
GetNextInstruction(hp1, hp2) and
|
|
(hp2.typ=ait_instruction) and
|
|
(taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
|
|
(taicpu(hp2).ops>0) and
|
|
(taicpu(hp2).oper[0]^.typ = top_ref) and
|
|
(taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
|
|
|
|
GetNextInstruction(hp2, hp3) and
|
|
(hp3.typ=ait_label) and
|
|
(taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
|
|
|
|
GetNextInstruction(hp3, hp4) and
|
|
(hp4.typ=ait_instruction) and
|
|
|
|
GetNextInstruction(hp4, hp5) and
|
|
(hp3.typ=ait_label) and
|
|
(taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
|
|
begin
|
|
tai_label(hp3).labsym.decrefs;
|
|
tai_label(hp5).labsym.decrefs;
|
|
|
|
AsmL.remove(hp1);
|
|
taicpu(hp1).Free;
|
|
|
|
AsmL.remove(hp2);
|
|
taicpu(hp2).Free;
|
|
|
|
result:=true;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure TCpuAsmOptimizer.PeepHoleOptPass2;
|
|
begin
|
|
end;
|
|
|
|
begin
|
|
casmoptimizer:=TCpuAsmOptimizer;
|
|
End.
|