Jonas Maebe b57c95043f + support overriding tdef/tsym methods with target-specific functionality: ... o made all (non-abstract) tdef and tsym constructors virtual o added c*def/c*sym classref types for every (non-abstract) t*def/t*sym class o added cpusym unit for every architecture that derives a tcpu*def/tcpu*sym class from the base classes, and initialises the c*def/c*sym classes with them. This is done so that the llvm target will be able to derive from the tcpu*def/sym classes without umpteen ifdefs, and it also means that the WPO can devirtualise everything because the c* variables are only initialised with one class type o replaced all t*def/t*sym constructor calls with c*def/c*sym constructor calls git-svn-id: trunk@27361 -		2014-03-29 22:31:55 +00:00
..
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	+ support passing far addresses in tcg8086.a_loadaddr_ref_cgpara	2014-03-25 00:45:22 +00:00
cpubase.inc	Implement support for saving and restoring address registers.	2013-10-05 21:43:42 +00:00
cpuinfo.pas	* Included cs_opt_peephole into genericlevel1optimizerswitches, so it is re-enabled for all targets after r27106.	2014-03-15 21:23:29 +00:00
cpunode.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00
cpupara.pas	* set the para sizes correctly for push_addr_params in i8086 far data memory	2014-03-25 00:40:48 +00:00
cpupi.pas
cputarg.pas
hlcgcpu.pas	* support implicit pointer types (classes, dynarrays, ansistrings, etc.) in	2014-03-29 14:00:24 +00:00
i8086att.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086atts.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086int.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086nop.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086op.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086prop.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086tab.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
n8086add.pas	* fixes in the 16 to 32-bit multiplication in ti8086addnode.second_mul	2014-01-18 00:38:46 +00:00
n8086cal.pas	* x86: Cleaned out addr_far,addr_far_ref used to encode far calls/jumps. NASM (and FPC x86 assembler based on it) already have opsize=S_FAR for this purpose.	2014-03-08 22:54:43 +00:00
n8086cnv.pas	* refactored tcgtypeconvnode.second_ansistring_to_pchar to use the high level	2014-03-25 01:27:58 +00:00
n8086con.pas	* fixed class name in comment	2014-03-28 00:16:03 +00:00
n8086inl.pas	+ fixed get_frame for i8086 far data memory models	2014-03-02 19:36:35 +00:00
n8086mat.pas	+ enabled the use of the DIV/IDIV instruction for 16-bit div/mod on i8086	2013-11-11 22:34:41 +00:00
n8086mem.pas	* removed {$ifndef i8086} in tx86vecnode, instead reset cvecnode to	2014-03-29 22:31:49 +00:00
r8086ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086nasm.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086nor.inc
r8086nri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086stab.inc
r8086std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
ra8086att.pas	* changed the default i8086 asmmode to Intel	2013-09-21 18:43:34 +00:00
ra8086int.pas	* changed the default i8086 asmmode to Intel	2013-09-21 18:43:34 +00:00
rgcpu.pas	* when a i8086 reference uses only one register, choose it from the set [BX,BP,SI,DI] as it can be treated either as a base or an index, depending on what's convenient	2013-07-29 21:03:10 +00:00
symcpu.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00