nickysn b672bc754a - rm references to system_i386_darwin and system_i386_iphonesim from ... tcg8086.init_register_allocators git-svn-id: trunk@26910 -		2014-03-01 12:52:31 +00:00
..
aoptcpu.pas	+ enable jump optimizer for i8086	2013-05-01 13:54:13 +00:00
aoptcpub.pas	+ enable jump optimizer for i8086	2013-05-01 13:54:13 +00:00
aoptcpud.pas	+ enable jump optimizer for i8086	2013-05-01 13:54:13 +00:00
cgcpu.pas	- rm references to system_i386_darwin and system_i386_iphonesim from	2014-03-01 12:52:31 +00:00
cpubase.inc	Implement support for saving and restoring address registers.	2013-10-05 21:43:42 +00:00
cpuinfo.pas	- disable cs_opt_nodecse from -O2 on i8086, because it breaks building packages	2014-01-26 02:08:08 +00:00
cpunode.pas	+ i8086 specific far proc aware implementation of ttypeconvnode.second_proc_to_procvar	2013-06-10 01:19:01 +00:00
cpupara.pas	* set all the i8086 calling conventions' volatile registers to be the same as the 'pascal' calling convention; this should make cdecl compatible with 16-bit C compilers	2013-07-18 21:01:41 +00:00
cpupi.pas	- rm ti8086procinfo.allocate_got_register as it isn't used on the i8086	2013-04-14 14:35:51 +00:00
cputarg.pas
hlcgcpu.pas	* handle 4-byte records in registers as well in location_force_mem on i8086	2013-11-09 21:57:29 +00:00
i8086att.inc	+ tzcnt assembler instruction	2014-01-18 12:11:50 +00:00
i8086atts.inc	+ tzcnt assembler instruction	2014-01-18 12:11:50 +00:00
i8086int.inc	+ tzcnt assembler instruction	2014-01-18 12:11:50 +00:00
i8086nop.inc	+ tzcnt assembler instruction	2014-01-18 12:11:50 +00:00
i8086op.inc	+ tzcnt assembler instruction	2014-01-18 12:11:50 +00:00
i8086prop.inc	* fixed modification information for some avx instructions	2014-02-22 15:52:33 +00:00
i8086tab.inc	+ tzcnt assembler instruction	2014-01-18 12:11:50 +00:00
n8086add.pas	* fixes in the 16 to 32-bit multiplication in ti8086addnode.second_mul	2014-01-18 00:38:46 +00:00
n8086cal.pas	* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.	2014-02-03 13:28:56 +00:00
n8086cnv.pas	* fixed the assignment of global functions to nested procvars in i8086 far code	2013-10-19 20:42:39 +00:00
n8086con.pas	* i8086 specific code from tcgpointerconstnode.pass_generate_code moved to an i8086 specific overriden method	2013-05-24 17:16:55 +00:00
n8086inl.pas
n8086mat.pas	+ enabled the use of the DIV/IDIV instruction for 16-bit div/mod on i8086	2013-11-11 22:34:41 +00:00
n8086mem.pas	+ getting the address of a label now returns a far pointer in i8086 far code memory models; this fixes the call to fpc_raiseexception in the raise node	2013-09-17 22:45:13 +00:00
r8086ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086nasm.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086nor.inc
r8086nri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086stab.inc
r8086std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
ra8086att.pas	* changed the default i8086 asmmode to Intel	2013-09-21 18:43:34 +00:00
ra8086int.pas	* changed the default i8086 asmmode to Intel	2013-09-21 18:43:34 +00:00
rgcpu.pas	* when a i8086 reference uses only one register, choose it from the set [BX,BP,SI,DI] as it can be treated either as a base or an index, depending on what's convenient	2013-07-29 21:03:10 +00:00