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aasmcpu.pas
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* synchronized with privatetrunk till r30095
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2015-03-05 20:32:15 +00:00 |
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agx86att.pas
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+ iphonesim/x86_64 target (64 bit iOS simulator)
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2015-02-23 22:56:09 +00:00 |
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agx86int.pas
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* synchronized with privatetrunk till r30095
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2015-03-05 20:32:15 +00:00 |
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agx86nsm.pas
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Added aitconst_gs for AVR pointer references to Flash.
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2015-04-04 10:29:11 +00:00 |
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cga.pas
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+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
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2014-04-13 19:21:54 +00:00 |
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cgx86.pas
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* synchronized with privatetrunk till r30095
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2015-03-05 20:32:15 +00:00 |
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cpubase.pas
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* fixed first_fpu_immreg definition
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2015-04-04 14:29:09 +00:00 |
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hlcgx86.pas
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* synchronized with privatetrunk till r30095
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2015-03-05 20:32:15 +00:00 |
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itcpugas.pas
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itx86int.pas
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ni86mem.pas
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* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
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2014-03-30 15:42:53 +00:00 |
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nx86add.pas
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x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.
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2014-08-20 10:21:06 +00:00 |
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nx86cal.pas
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* pass a list of (pointers to) the paralocs to hlcgobj.a_call/g_call*, as
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2014-03-06 21:40:57 +00:00 |
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nx86cnv.pas
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* renamed getdatalabel() to getglobaldatalabel
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2015-03-27 21:25:34 +00:00 |
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nx86con.pas
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nx86inl.pas
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+ cpu capability CPUX86_HAS_CMOV
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2015-02-21 20:47:40 +00:00 |
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nx86mat.pas
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* renamed getdatalabel() to getglobaldatalabel
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2015-03-27 21:25:34 +00:00 |
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nx86mem.pas
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* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
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2015-02-23 22:56:00 +00:00 |
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nx86set.pas
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* renamed getdatalabel() to getglobaldatalabel
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2015-03-27 21:25:34 +00:00 |
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rax86.pas
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- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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2014-11-16 16:37:26 +00:00 |
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rax86att.pas
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- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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2014-11-16 16:37:26 +00:00 |
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rax86int.pas
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+ applied remaining patches of Torsten Grundke: adds gather instructions of avx2
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2015-02-17 21:43:46 +00:00 |
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rgx86.pas
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* synchronised with r28168 of trunk
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2014-07-05 21:30:28 +00:00 |
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symi86.pas
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* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to
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2014-04-12 15:34:08 +00:00 |
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symx86.pas
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* reimplemented r28329 in a different way, as suggested by Jonas
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2014-08-07 19:36:52 +00:00 |
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x86ins.dat
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* corrects change flags for VSQRTSD
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2015-02-28 22:42:25 +00:00 |
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x86reg.dat
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