sergei ed4e876f4f * Generate exception filters data on i386-win32 and x86_64-win64 without using global labels. ... git-svn-id: trunk@29512 -		2015-01-20 13:52:19 +00:00
..
aoptcpu.pas	* optimize vmovaps/vmovapd after avx instructions	2014-05-01 19:20:35 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	* handle the fact that records containing a single extended value are	2014-11-04 21:16:27 +00:00
cpubase.inc
cpuelf.pas	* first dragonfly patch (existing most). Mantis #27091	2014-12-07 20:27:02 +00:00
cpuinfo.pas	+ change always floating point divisions into multiplications if they are a power of two,	2014-11-16 20:47:38 +00:00
cpunode.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00
cpupara.pas	* handle the fact that records containing a single extended value are	2014-11-04 21:16:27 +00:00
cpupi.pas
cputarg.pas	Enable nasm assembler for x86_64 cpu	2014-01-21 00:26:49 +00:00
hlcgcpu.pas
nx64add.pas	* use IMUL even for unsigned multiplication on x86_64, when overflow checking is	2014-01-18 03:36:15 +00:00
nx64cal.pas
nx64cnv.pas
nx64flw.pas	* Generate exception filters data on i386-win32 and x86_64-win64 without using global labels.	2015-01-20 13:52:19 +00:00
nx64inl.pas
nx64mat.pas	* Moved x86_64 mod/div code to x86, with minimal changes to ensure it compiles on i386/i8086. Merging optimized division-by-const code from i386 is pending...	2014-06-11 01:42:46 +00:00
nx64set.pas	* fixed r26519 for darwin/x86-64, see comments (mantis #25644)	2014-01-29 21:26:45 +00:00
r8664ari.inc
r8664att.inc
r8664con.inc
r8664dwrf.inc
r8664int.inc
r8664iri.inc
r8664nasm.inc	* set Ch_* for more operations	2014-01-26 12:37:50 +00:00
r8664nor.inc
r8664num.inc
r8664ot.inc
r8664rni.inc
r8664sri.inc
r8664stab.inc
r8664std.inc
rax64att.pas	- Forgot to commit with r29081	2014-11-16 17:29:52 +00:00
rax64int.pas
rgcpu.pas	* rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers	2014-01-30 19:44:14 +00:00
symcpu.pas	* reimplemented r28329 in a different way, as suggested by Jonas	2014-08-07 19:36:52 +00:00
win64unw.pas
x8664ats.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
x8664att.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
x8664int.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
x8664nop.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664op.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
x8664pro.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
x8664tab.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00