Jonas Maebe d452686c39 * moved pbestrealtype from symdef to symcpu ... git-svn-id: trunk@27441 -		2014-04-01 21:41:37 +00:00
..
aoptcpu.pas	+ peephole optimizations AndMovzToAnd, MovMov2Mov1 and MovMov2MovMov1 for x86-64	2014-03-18 21:54:42 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	+ cs_userbp optimizer switch, so on x86-64 the compiler can make use of rbp if it is not needed as frame pointer	2014-01-30 19:44:17 +00:00
cpubase.inc	* optimize mov/lea	2013-11-01 19:01:14 +00:00
cpuelf.pas
cpuinfo.pas	+ CPU type corei	2014-02-16 08:27:27 +00:00
cpunode.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00
cpupara.pas	* Win64 apparently expects records with single field of floating-point type to be passed the same way as that only field, i.e. in xmm register. Fixes tests/cg/tcalext6.pp.	2014-04-01 17:04:47 +00:00
cpupi.pas
cputarg.pas	Enable nasm assembler for x86_64 cpu	2014-01-21 00:26:49 +00:00
hlcgcpu.pas
nx64add.pas	* use IMUL even for unsigned multiplication on x86_64, when overflow checking is	2014-01-18 03:36:15 +00:00
nx64cal.pas
nx64cnv.pas
nx64flw.pas	- Removed Win64 SEH code specific to results of managed types returned in registers. Since r26228 managed types are always returned in parameters.	2014-03-16 15:48:49 +00:00
nx64inl.pas
nx64mat.pas	* fixes masking error in tx8664shlshrnode.pass_generate_code	2014-02-08 10:15:47 +00:00
nx64set.pas	* fixed r26519 for darwin/x86-64, see comments (mantis #25644)	2014-01-29 21:26:45 +00:00
r8664ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664nasm.inc	* set Ch_* for more operations	2014-01-26 12:37:50 +00:00
r8664nor.inc
r8664num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664stab.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
rax64att.pas
rax64int.pas
rgcpu.pas	* rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers	2014-01-30 19:44:14 +00:00
symcpu.pas	* moved pbestrealtype from symdef to symcpu	2014-04-01 21:41:37 +00:00
win64unw.pas
x8664ats.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664att.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664int.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664nop.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664op.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664pro.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
x8664tab.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00