nickysn bfd5670cc8 + support new magic code \23 in the internal asm writer - same as \13, but with ... the condition inverted; this will be used to simulate near conditional jumps on processors earlier than 386 (i.e. "Jcc near target" will be encoded as "JNcc short +3; JMP target") git-svn-id: trunk@30611 -		2015-04-16 16:53:48 +00:00
..
aasmcpu.pas	+ support new magic code \23 in the internal asm writer - same as \13, but with	2015-04-16 16:53:48 +00:00
agx86att.pas	+ iphonesim/x86_64 target (64 bit iOS simulator)	2015-02-23 22:56:09 +00:00
agx86int.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
agx86nsm.pas	* align non-code sections with zeros, instead of nops in the nasm asm output	2015-04-06 20:30:06 +00:00
cga.pas
cgx86.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
cpubase.pas	* fixed first_fpu_immreg definition	2015-04-04 14:29:09 +00:00
hlcgx86.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
itcpugas.pas
itx86int.pas
ni86mem.pas
nx86add.pas	x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.	2014-08-20 10:21:06 +00:00
nx86cal.pas
nx86cnv.pas	* renamed getdatalabel() to getglobaldatalabel	2015-03-27 21:25:34 +00:00
nx86con.pas
nx86inl.pas	* don't give an internalerror when trying to prefetch a regvar or even	2015-04-08 20:35:13 +00:00
nx86mat.pas	* renamed getdatalabel() to getglobaldatalabel	2015-03-27 21:25:34 +00:00
nx86mem.pas	* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe	2015-02-23 22:56:00 +00:00
nx86set.pas	* renamed getdatalabel() to getglobaldatalabel	2015-03-27 21:25:34 +00:00
rax86.pas	- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.	2014-11-16 16:37:26 +00:00
rax86att.pas	- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.	2014-11-16 16:37:26 +00:00
rax86int.pas	+ applied remaining patches of Torsten Grundke: adds gather instructions of avx2	2015-02-17 21:43:46 +00:00
rgx86.pas	* synchronised with r28168 of trunk	2014-07-05 21:30:28 +00:00
symi86.pas
symx86.pas	* reimplemented r28329 in a different way, as suggested by Jonas	2014-08-07 19:36:52 +00:00
x86ins.dat	* corrects change flags for VSQRTSD	2015-02-28 22:42:25 +00:00
x86reg.dat