Jonas Maebe 67b8aceaee * synchronized with privatetrunk till r30095 ... git-svn-id: branches/hlcgllvm@30101 -		2015-03-05 20:32:15 +00:00
..
aasmcpu.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
agx86att.pas	+ iphonesim/x86_64 target (64 bit iOS simulator)	2015-02-23 22:56:09 +00:00
agx86int.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
agx86nsm.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
cga.pas	+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.	2014-04-13 19:21:54 +00:00
cgx86.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
cpubase.pas	+ Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362.	2014-04-14 12:36:11 +00:00
hlcgx86.pas	* synchronized with privatetrunk till r30095	2015-03-05 20:32:15 +00:00
itcpugas.pas
itx86int.pas
ni86mem.pas
nx86add.pas	x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.	2014-08-20 10:21:06 +00:00
nx86cal.pas
nx86cnv.pas
nx86con.pas
nx86inl.pas	+ cpu capability CPUX86_HAS_CMOV	2015-02-21 20:47:40 +00:00
nx86mat.pas	* make integer division instruction (div/idiv) on x86 dependent on the	2015-01-04 13:08:57 +00:00
nx86mem.pas	* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe	2015-02-23 22:56:00 +00:00
nx86set.pas
rax86.pas	- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.	2014-11-16 16:37:26 +00:00
rax86att.pas	- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.	2014-11-16 16:37:26 +00:00
rax86int.pas	+ applied remaining patches of Torsten Grundke: adds gather instructions of avx2	2015-02-17 21:43:46 +00:00
rgx86.pas	* synchronised with r28168 of trunk	2014-07-05 21:30:28 +00:00
symi86.pas	* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to	2014-04-12 15:34:08 +00:00
symx86.pas	* reimplemented r28329 in a different way, as suggested by Jonas	2014-08-07 19:36:52 +00:00
x86ins.dat	* corrects change flags for VSQRTSD	2015-02-28 22:42:25 +00:00
x86reg.dat