florian c321fb35f1 * integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64 ... + %icc and %xcc register for sparc64 git-svn-id: trunk@36548 -		2017-06-19 21:18:09 +00:00
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aoptcpud.pas
cgcpu.pas	* split the sparc code generator into a generic base class and separate classes for sparc32 and sparc64	2017-06-06 20:11:07 +00:00
cpuelf.pas	Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).	2014-12-14 16:28:35 +00:00
cpuinfo.pas	Moved tcontrollerdatatype out into cpuinfo.	2015-09-07 20:36:54 +00:00
cpunode.pas	* automatically generate necessary indirect symbols when a new assembler	2016-07-20 20:53:03 +00:00
cpupara.pas	* sparc64 compiler can be build, not working yet	2017-06-02 20:13:30 +00:00
cputarg.pas
rspcon.inc	* integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64	2017-06-19 21:18:09 +00:00
rspdwrf.inc
rspnor.inc
rspnum.inc
rsprni.inc	* integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64	2017-06-19 21:18:09 +00:00
rspsri.inc
rspstab.inc
rspstd.inc
rspsup.inc