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		edd42aa42a
		
	
	
	
	
		
			
			future use by high level code generator targets
   o this in turn required that all a_load*_loc* methods are called via
     hlcg rather than via cg, since a location can be a subsetref/reg and
     and those are no longer handled in tcg
   o that then required moving several force_location_* routines into
     thlcg because they use a_load_loc*, but did not take tdef size
     parameters (which are required by the thlcg a_load_loc* routines)
   o the only practical consequence is that from now on, you have to
     use hlcg.location_force_mem/reg() (fpureg not yet) and
     hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
     and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
     might be involved
git-svn-id: trunk@21287 -
		
	
			
		
			
				
	
	
		
			379 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
			
		
		
	
	
			379 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
| {
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|     Copyright (c) 1998-2002 by Florian Klaempfl
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| 
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|     Generate for x86-64 and i386 assembler for type converting nodes
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| 
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|     This program is free software; you can redistribute it and/or modify
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|     it under the terms of the GNU General Public License as published by
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|     the Free Software Foundation; either version 2 of the License, or
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|     (at your option) any later version.
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| 
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|     This program is distributed in the hope that it will be useful,
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|     but WITHOUT ANY WARRANTY; without even the implied warranty of
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|     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|     GNU General Public License for more details.
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| 
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|     You should have received a copy of the GNU General Public License
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|     along with this program; if not, write to the Free Software
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|     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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| 
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|  ****************************************************************************
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| }
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| unit nx86cnv;
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| 
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| {$i fpcdefs.inc}
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| 
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| interface
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| 
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|     uses
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|       node,ncgcnv,defutil,defcmp;
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| 
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|     type
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|        tx86typeconvnode = class(tcgtypeconvnode)
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|        protected
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|          function first_real_to_real : tnode;override;
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|          { procedure second_int_to_int;override; }
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|          { procedure second_string_to_string;override; }
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|          { procedure second_cstring_to_pchar;override; }
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|          { procedure second_string_to_chararray;override; }
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|          { procedure second_array_to_pointer;override; }
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|          { procedure second_pointer_to_array;override; }
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|          { procedure second_chararray_to_string;override; }
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|          { procedure second_char_to_string;override; }
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|          function first_int_to_real: tnode; override;
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|          procedure second_int_to_real;override;
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|          { procedure second_real_to_real;override; }
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|          { procedure second_cord_to_pointer;override; }
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|          { procedure second_proc_to_procvar;override; }
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|          { procedure second_bool_to_int;override; }
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|            procedure second_int_to_bool;override;
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|          { procedure second_set_to_set;override;  }
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|          { procedure second_ansistring_to_pchar;override; }
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|          { procedure second_pchar_to_string;override; }
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|          { procedure second_class_to_intf;override;  }
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|          { procedure second_char_to_char;override; }
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|        end;
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| 
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| 
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| implementation
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| 
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|    uses
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|       verbose,systems,globals,globtype,
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|       aasmbase,aasmtai,aasmdata,aasmcpu,
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|       symconst,symdef,
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|       cgbase,cga,procinfo,pass_1,pass_2,
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|       ncon,ncal,ncnv,
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|       cpubase,
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|       cgutils,cgobj,hlcgobj,cgx86,ncgutil,
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|       tgobj;
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| 
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| 
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|     function tx86typeconvnode.first_real_to_real : tnode;
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|       begin
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|          first_real_to_real:=nil;
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|         { comp isn't a floating type }
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|          if (tfloatdef(resultdef).floattype=s64comp) and
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|             (tfloatdef(left.resultdef).floattype<>s64comp) and
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|             not (nf_explicit in flags) then
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|            CGMessage(type_w_convert_real_2_comp);
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|          if use_vectorfpu(resultdef) then
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|            expectloc:=LOC_MMREGISTER
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|          else
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|            expectloc:=LOC_FPUREGISTER;
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|       end;
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| 
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| 
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|     procedure tx86typeconvnode.second_int_to_bool;
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|       var
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| {$ifndef cpu64bitalu}
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|         hreg2,
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|         hregister : tregister;
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|         href      : treference;
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| {$endif not cpu64bitalu}
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|         resflags  : tresflags;
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|         hlabel,oldTrueLabel,oldFalseLabel : tasmlabel;
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|         newsize   : tcgsize;
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|       begin
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|          oldTrueLabel:=current_procinfo.CurrTrueLabel;
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|          oldFalseLabel:=current_procinfo.CurrFalseLabel;
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|          current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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|          current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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|          secondpass(left);
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|          if codegenerror then
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|           exit;
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|          { Explicit typecasts from any ordinal type to a boolean type }
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|          { must not change the ordinal value                          }
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|          if (nf_explicit in flags) and
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|             not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
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|            begin
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|               location_copy(location,left.location);
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|               newsize:=def_cgsize(resultdef);
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|               { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
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|               if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
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|                  ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
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|                 hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
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|               else
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|                 location.size:=newsize;
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|               current_procinfo.CurrTrueLabel:=oldTrueLabel;
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|               current_procinfo.CurrFalseLabel:=oldFalseLabel;
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|               exit;
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|            end;
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| 
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|          { Load left node into flag F_NE/F_E }
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|          resflags:=F_NE;
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| 
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|          if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
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|            hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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| 
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|          case left.location.loc of
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|             LOC_CREFERENCE,
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|             LOC_REFERENCE :
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|               begin
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| {$ifndef cpu64bitalu}
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|                 if left.location.size in [OS_64,OS_S64] then
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|                  begin
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|                    hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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|                    cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.reference,hregister);
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|                    href:=left.location.reference;
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|                    inc(href.offset,4);
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|                    cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,href,hregister);
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|                  end
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|                 else
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| {$endif not cpu64bitalu}
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|                  begin
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|                    hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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|                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
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|                  end;
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|               end;
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|             LOC_FLAGS :
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|               begin
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|                 resflags:=left.location.resflags;
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|               end;
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|             LOC_REGISTER,LOC_CREGISTER :
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|               begin
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| {$ifndef cpu64bitalu}
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|                 if left.location.size in [OS_64,OS_S64] then
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|                  begin
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|                    hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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|                    cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
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|                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
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|                  end
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|                 else
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| {$endif not cpu64bitalu}
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|                   cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
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|               end;
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|             LOC_JUMP :
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|               begin
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|                 location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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|                 location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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|                 current_asmdata.getjumplabel(hlabel);
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|                 cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
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|                 if not(is_cbool(resultdef)) then
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|                   cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
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|                 else
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|                   cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
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|                 cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
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|                 cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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|                 cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
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|                 cg.a_label(current_asmdata.CurrAsmList,hlabel);
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|               end;
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|             else
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|               internalerror(10062);
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|          end;
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|          if (left.location.loc<>LOC_JUMP) then
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|            begin
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|              { load flags to register }
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|              location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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| {$ifndef cpu64bitalu}
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|               if (location.size in [OS_64,OS_S64]) then
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|                 begin
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|                   hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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|                   cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
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|                   if (is_cbool(resultdef)) then
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|                     cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
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|                   location.register64.reglo:=hreg2;
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|                   location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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|                   if (is_cbool(resultdef)) then
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|                     { reglo is either 0 or -1 -> reghi has to become the same }
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|                     cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
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|                   else
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|                     { unsigned }
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|                     cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
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|                 end
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|              else
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| {$endif not cpu64bitalu}
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|                begin
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|                  location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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|                  cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
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|                  if (is_cbool(resultdef)) then
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|                    cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
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|                end
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|            end;
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|          current_procinfo.CurrTrueLabel:=oldTrueLabel;
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|          current_procinfo.CurrFalseLabel:=oldFalseLabel;
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|        end;
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| 
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| 
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|     function tx86typeconvnode.first_int_to_real : tnode;
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| 
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|       begin
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|         first_int_to_real:=nil;
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|         if (left.resultdef.size<4) then
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|           begin
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|             inserttypeconv(left,s32inttype);
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|             firstpass(left)
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|           end;
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| 
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|         if use_vectorfpu(resultdef) and
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|            (torddef(left.resultdef).ordtype = s32bit) then
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|           expectloc:=LOC_MMREGISTER
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|         else
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|           expectloc:=LOC_FPUREGISTER;
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|       end;
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| 
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| 
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|     procedure tx86typeconvnode.second_int_to_real;
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| 
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|       var
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|          leftref,
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|          href : treference;
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|          l1,l2 : tasmlabel;
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|          op: tasmop;
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|          opsize: topsize;
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|          signtested : boolean;
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|       begin
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|         if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
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|           hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
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|         if use_vectorfpu(resultdef) and
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| {$ifdef cpu64bitalu}
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|            (torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
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| {$else cpu64bitalu}
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|            (torddef(left.resultdef).ordtype=s32bit) then
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| {$endif cpu64bitalu}
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|           begin
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|             location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
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|             location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
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|             case location.size of
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|               OS_F32:
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|                 op:=A_CVTSI2SS;
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|               OS_F64:
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|                 op:=A_CVTSI2SD;
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|               else
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|                 internalerror(2007120902);
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|             end;
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|             { don't use left.location.size, because that one may be OS_32/OS_64
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|               if the lower bound of the orddef >= 0
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|             }
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|             case torddef(left.resultdef).ordtype of
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|               s32bit:
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|                 opsize:=S_L;
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|               s64bit:
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|                 opsize:=S_Q;
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|               else
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|                 internalerror(2007120903);
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|             end;
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|             case left.location.loc of
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|               LOC_REFERENCE,
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|               LOC_CREFERENCE:
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|                 begin
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|                   href:=left.location.reference;
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|                   tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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|                   current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
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|                 end;
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|               LOC_REGISTER,
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|               LOC_CREGISTER:
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|                 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
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|             end;
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|           end
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|         else
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|           begin
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|             location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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|             if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
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|               begin
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|     {$ifdef cpu64bitalu}
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|                 emit_const_reg(A_BT,S_Q,63,left.location.register);
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|     {$else cpu64bitalu}
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|                 emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
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|     {$endif cpu64bitalu}
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|                 signtested:=true;
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|               end
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|             else
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|               signtested:=false;
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|     
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|             { We need to load from a reference }
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|             hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
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|             { don't change left.location.reference, because if it's a temp we
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|               need the original location at the end so we can free it }
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|             leftref:=left.location.reference;
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|             tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
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| 
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|             { For u32bit we need to load it as comp and need to
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|               make it 64bits }
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|             if (torddef(left.resultdef).ordtype=u32bit) then
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|               begin
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|                 tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
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|                 location_freetemp(current_asmdata.CurrAsmList,left.location);
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|                 cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
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|                 inc(href.offset,4);
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|                 cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
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|                 dec(href.offset,4);
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|                 { could be a temp with an offset > 32 bit on x86_64 }
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|                 tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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|                 leftref:=href;
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|               end;
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|     
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|             { Load from reference to fpu reg }
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|             case torddef(left.resultdef).ordtype of
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|               u32bit,
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|               scurrency,
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|               s64bit:
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|                 begin
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|                   current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
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|                 end;
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|               u64bit:
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|                 begin
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|                    { unsigned 64 bit ints are harder to handle:
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|                      we load bits 0..62 and then check bit 63:
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|                      if it is 1 then we add $80000000 000000000
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|                      as double                                  }
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|                    current_asmdata.getdatalabel(l1);
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|                    current_asmdata.getjumplabel(l2);
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|     
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|                    if not(signtested) then
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|                      begin
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|                        inc(leftref.offset,4);
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|                        emit_const_ref(A_BT,S_L,31,leftref);
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|                        dec(leftref.offset,4);
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|                      end;
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|     
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|                    current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
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|                    cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2);
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|                    new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
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|                    current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
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|                    { I got this constant from a test program (FK) }
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|                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
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|                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(longint ($80000000)));
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|                    current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($0000403f));
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|                    reference_reset_symbol(href,l1,0,4);
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|                    tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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|                    current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FLD,S_FX,href));
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|                    current_asmdata.CurrAsmList.concat(Taicpu.Op_reg_reg(A_FADDP,S_NO,NR_ST,NR_ST1));
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|                    cg.a_label(current_asmdata.CurrAsmList,l2);
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|                 end
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|               else
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|                 begin
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|                   if left.resultdef.size<4 then
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|                     internalerror(2007120901);
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|                  current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
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|                 end;
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|             end;
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|             tcgx86(cg).inc_fpu_stack;
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|             location.register:=NR_ST;
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|           end;
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|         location_freetemp(current_asmdata.CurrAsmList,left.location);
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|       end;
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| 
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| begin
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|   ctypeconvnode:=tx86typeconvnode
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| end.
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