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https://gitlab.com/freepascal.org/fpc/source.git
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+ RTL support: o VFP exceptions are disabled by default on Darwin, because they cause kernel panics on iPhoneOS 2.2.1 at least o all denormals are truncated to 0 on Darwin, because disabling that also causes kernel panics on iPhoneOS 2.2.1 (probably because otherwise denormals can also cause exceptions) * set softfloat rounding mode correctly for non-wince/darwin/vfp targets + compiler support: only half the number of single precision registers is available due to limitations of the register allocator + added a number of comments about why the stackframe on ARM is set up the way it is by the compiler + added regtype and subregtype info to regsets, because they're also used for VFP registers (+ support in assembler reader) + various generic support routines for dealing with floating point values located in integer registers that have to be transferred to mm registers (needed for VFP) * renamed use_sse() to use_vectorfpu() and also use it for ARM/vfp support o only superficially tested for Linux (compiler compiled with -Cpvfpv6 -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least the fpu exception handler still needs to be implemented), Darwin has been tested more thoroughly + added ARMv6 cpu type and made it default for Darwin/ARM + ARMv6+ implementations of atomic operations using ldrex/strex * don't use r9 on Darwin/ARM, as it's reserved under certain circumstances (don't know yet which ones) * changed C-test object files for ARM/Darwin to ARMv6 versions * check in assembler reader that regsets are not empty, because instructions with a regset operand have undefined behaviour in that case * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of int64->single type conversion * fixed constant pool locations in case 64 bit constants are generated, and/or when vfp instructions with limited reach are present WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all code with -Cparmv6 (or higher), or you will get crashes. The reason is that storing/restoring multiple VFP registers must happen using different instructions on pre/post-ARMv6. git-svn-id: trunk@14317 -
622 lines
24 KiB
ObjectPascal
622 lines
24 KiB
ObjectPascal
{
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Copyright (c) 2000-2002 by Florian Klaempfl
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Generate assembler for nodes that handle type conversions which are
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the same for all (most) processors
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgcnv;
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{$i fpcdefs.inc}
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interface
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uses
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node,ncnv,defutil,defcmp;
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type
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tcgtypeconvnode = class(ttypeconvnode)
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procedure second_int_to_int;override;
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procedure second_cstring_to_pchar;override;
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procedure second_cstring_to_int;override;
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procedure second_string_to_chararray;override;
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procedure second_array_to_pointer;override;
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procedure second_pointer_to_array;override;
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procedure second_char_to_string;override;
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procedure second_real_to_real;override;
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procedure second_cord_to_pointer;override;
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procedure second_proc_to_procvar;override;
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procedure second_nil_to_methodprocvar;override;
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procedure second_bool_to_int;override;
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procedure second_bool_to_bool;override;
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procedure second_ansistring_to_pchar;override;
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procedure second_class_to_intf;override;
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procedure second_char_to_char;override;
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procedure second_nothing;override;
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procedure pass_generate_code;override;
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end;
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tcgasnode = class(tasnode)
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procedure pass_generate_code;override;
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end;
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implementation
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uses
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cutils,verbose,globtype,globals,
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aasmbase,aasmtai,aasmdata,aasmcpu,symconst,symdef,paramgr,
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ncon,ncal,
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cpubase,systems,
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procinfo,pass_2,
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cgbase,
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cgutils,cgobj,
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ncgutil,
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tgobj
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;
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procedure tcgtypeconvnode.second_int_to_int;
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var
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orgsize,
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newsize : tcgsize;
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ressize,
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leftsize : longint;
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begin
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newsize:=def_cgsize(resultdef);
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{ insert range check if not explicit conversion }
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if not(nf_explicit in flags) then
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cg.g_rangecheck(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef);
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{ is the result size smaller? when typecasting from void
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we always reuse the current location, because there is
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nothing that we can load in a register }
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ressize := resultdef.size;
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leftsize := left.resultdef.size;
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if (ressize<>leftsize) and
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not is_void(left.resultdef) then
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begin
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location_copy(location,left.location);
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{ reuse a loc_reference when the newsize is smaller than
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than the original, else load it to a register }
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if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) and
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(ressize<leftsize) then
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begin
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location.size:=newsize;
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if (target_info.endian = ENDIAN_BIG) then
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begin
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inc(location.reference.offset,leftsize-ressize);
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location.reference.alignment:=newalignment(location.reference.alignment,leftsize-ressize);
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end;
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end
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else
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location_force_reg(current_asmdata.CurrAsmList,location,newsize,false);
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end
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else
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begin
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{ no special loading is required, reuse current location }
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{ that's not true, if you go from signed to unsiged or }
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{ vice versa, you need sign extension/removal if the }
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{ value is already in a register (at least for archs }
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{ which don't have 8bit register components etc) (JM) }
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location_copy(location,left.location);
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location.size:=newsize;
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orgsize := def_cgsize(left.resultdef);
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if (ressize < sizeof(aint)) and
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(location.loc in [LOC_REGISTER,LOC_CREGISTER]) and
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(orgsize <> newsize) then
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begin
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location.register := cg.getintregister(current_asmdata.CurrAsmList,newsize);
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location.loc := LOC_REGISTER;
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,orgsize,newsize,left.location.register,location.register);
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end;
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end;
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end;
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procedure tcgtypeconvnode.second_cstring_to_pchar;
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var
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hr : treference;
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begin
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if left.nodetype<>stringconstn then
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internalerror(200601131);
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location_reset(location,LOC_REGISTER,OS_ADDR);
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case tstringconstnode(left).cst_type of
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cst_conststring :
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begin
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location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
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end;
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cst_shortstring :
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begin
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inc(left.location.reference.offset);
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location.reference.alignment:=1;
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location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
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end;
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cst_widestring,
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cst_unicodestring,
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cst_ansistring :
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begin
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if tstringconstnode(left).len=0 then
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begin
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{ FPC_EMPTYCHAR is a widechar -> 2 bytes }
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reference_reset(hr,2);
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hr.symbol:=current_asmdata.RefAsmSymbol('FPC_EMPTYCHAR');
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location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,hr,location.register);
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end
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else
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begin
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location_copy(location,left.location);
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end;
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end;
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cst_longstring:
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begin
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{!!!!!!!}
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internalerror(8888);
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end;
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else
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internalerror(200808241);
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end;
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end;
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procedure tcgtypeconvnode.second_cstring_to_int;
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begin
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{ this can't happen because constants are already processed in
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pass 1 }
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internalerror(200510013);
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end;
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procedure tcgtypeconvnode.second_string_to_chararray;
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begin
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if is_chararray(left.resultdef) then
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begin
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location_copy(location,left.location);
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exit;
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end;
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{ should be handled already in resultdef pass (JM) }
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internalerror(200108292);
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end;
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procedure tcgtypeconvnode.second_array_to_pointer;
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begin
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location_reset(location,LOC_REGISTER,OS_ADDR);
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location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
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end;
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procedure tcgtypeconvnode.second_pointer_to_array;
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begin
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{ assume natural alignment }
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location_reset_ref(location,LOC_REFERENCE,OS_NO,resultdef.alignment);
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case left.location.loc of
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LOC_CREGISTER,
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LOC_REGISTER :
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begin
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{$ifdef cpu_uses_separate_address_registers}
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if getregtype(left.location.register)<>R_ADDRESSREGISTER then
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begin
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location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
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left.location.register,location.reference.base);
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end
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else
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{$endif}
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location.reference.base := left.location.register;
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,
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location.reference.base);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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end;
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else
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internalerror(2002032216);
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end;
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end;
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procedure tcgtypeconvnode.second_char_to_string;
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begin
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location_reset_ref(location,LOC_REFERENCE,OS_NO,2);
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case tstringdef(resultdef).stringtype of
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st_shortstring :
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begin
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tg.GetTemp(current_asmdata.CurrAsmList,256,2,tt_normal,location.reference);
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cg.a_load_loc_ref(current_asmdata.CurrAsmList,left.location.size,left.location,
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location.reference);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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end;
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{ the rest is removed in the resultdef pass and converted to compilerprocs }
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else
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internalerror(4179);
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end;
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end;
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procedure tcgtypeconvnode.second_real_to_real;
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{$ifdef x86}
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var
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tr: treference;
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{$endif x86}
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begin
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location_reset(location,expectloc,def_cgsize(resultdef));
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{$ifdef x86}
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{ extended types in memory which should be loaded into the sse unit
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must be converted by the fpu first, so force them to be loaded into
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the fpu }
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if (expectloc=LOC_MMREGISTER) and
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(left.location.size in [OS_F80,OS_C64]) then
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begin
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if (left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
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location_force_fpureg(current_asmdata.CurrAsmList,left.location,false);
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{ round them down to the proper precision }
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tg.gettemp(current_asmdata.currasmlist,resultdef.size,resultdef.alignment,tt_normal,tr);
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cg.a_loadfpu_reg_ref(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,tr);
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location_reset_ref(left.location,LOC_REFERENCE,location.size,tr.alignment);
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left.location.reference:=tr;
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end;
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{$endif x86}
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{ ARM VFP values are in integer registers when they are function results }
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if (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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case left.location.loc of
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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begin
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case expectloc of
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LOC_FPUREGISTER:
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begin
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{ on sparc a move from double -> single means from two to one register. }
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{ On all other platforms it also needs rounding to avoid that }
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{ single(double_regvar) = double_regvar is true in all cases }
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
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end;
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LOC_MMREGISTER:
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begin
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register,mms_movescalar);
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end
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else
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internalerror(2003012262);
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end;
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exit
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end;
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LOC_CREFERENCE,
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LOC_REFERENCE:
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begin
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if expectloc=LOC_MMREGISTER then
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begin
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location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,location.size,left.location,location.register,mms_movescalar)
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end
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else
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begin
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location_force_fpureg(current_asmdata.CurrAsmList,left.location,false);
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
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end;
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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end;
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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case expectloc of
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LOC_FPUREGISTER:
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begin
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location_force_fpureg(current_asmdata.CurrAsmList,left.location,false);
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
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end;
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LOC_MMREGISTER:
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begin
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location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register,mms_movescalar);
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end;
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else
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internalerror(2003012261);
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end;
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end;
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else
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internalerror(2002032215);
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end;
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end;
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procedure tcgtypeconvnode.second_cord_to_pointer;
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begin
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{ this can't happen because constants are already processed in
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pass 1 }
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internalerror(47423985);
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end;
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procedure tcgtypeconvnode.second_proc_to_procvar;
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begin
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if tabstractprocdef(resultdef).is_addressonly then
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begin
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location_reset(location,LOC_REGISTER,OS_ADDR);
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location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
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end
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else
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location_copy(location,left.location);
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end;
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procedure Tcgtypeconvnode.second_nil_to_methodprocvar;
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var r:Treference;
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begin
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tg.gettemp(current_asmdata.currasmlist,2*sizeof(puint),sizeof(puint),tt_normal,r);
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location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),0);
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location.reference:=r;
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cg.a_load_const_ref(current_asmdata.currasmlist,OS_ADDR,0,r);
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inc(r.offset,sizeof(puint));
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cg.a_load_const_ref(current_asmdata.currasmlist,OS_ADDR,0,r);
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end;
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procedure tcgtypeconvnode.second_bool_to_int;
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var
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newsize: tcgsize;
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oldTrueLabel,oldFalseLabel : tasmlabel;
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begin
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oldTrueLabel:=current_procinfo.CurrTrueLabel;
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oldFalseLabel:=current_procinfo.CurrFalseLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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secondpass(left);
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location_copy(location,left.location);
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newsize:=def_cgsize(resultdef);
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{ byte(bytebool) or word(wordbool) or longint(longbool) must be }
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{ accepted for var parameters and assignments, and must not }
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{ change the ordinal value or value location. }
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{ htypechk.valid_for_assign ensures that such locations with a }
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{ size<sizeof(register) cannot be LOC_CREGISTER (they otherwise }
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{ could be in case of a plain assignment), and LOC_REGISTER can }
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{ never be an assignment target. The remaining LOC_REGISTER/ }
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{ LOC_CREGISTER locations do have to be sign/zero-extended. }
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if not(nf_explicit in flags) or
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(location.loc in [LOC_FLAGS,LOC_JUMP]) or
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{ change of size/signedness? Then we have to sign/ }
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{ zero-extend in case of a loc_(c)register }
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((newsize<>left.location.size) and
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((left.resultdef.size<>resultdef.size) or
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not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]))) then
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location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
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else
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{ may differ in sign, e.g. bytebool -> byte }
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location.size:=newsize;
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current_procinfo.CurrTrueLabel:=oldTrueLabel;
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current_procinfo.CurrFalseLabel:=oldFalseLabel;
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end;
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procedure tcgtypeconvnode.second_bool_to_bool;
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begin
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{ we can reuse the conversion already available
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in bool_to_int to resize the value. But when the
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size of the new boolean is smaller we need to calculate
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the value as is done in int_to_bool. This is needed because
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the bits that define the true status can be outside the limits
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of the new size and truncating the register can result in a 0
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value }
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if (left.expectloc in [LOC_FLAGS,LOC_JUMP]) then
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begin
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secondpass(left);
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if (left.location.loc <> left.expectloc) then
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internalerror(20060409);
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location_copy(location,left.location);
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end
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else if (resultdef.size=left.resultdef.size) and
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not(is_cbool(resultdef) xor
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is_cbool(left.resultdef)) then
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second_bool_to_int
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else
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begin
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if (resultdef.size<>left.resultdef.size) then
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{ remove nf_explicit to perform full conversion if boolean sizes are different }
|
|
exclude(flags, nf_explicit);
|
|
second_int_to_bool;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure tcgtypeconvnode.second_ansistring_to_pchar;
|
|
var
|
|
l1 : tasmlabel;
|
|
hr : treference;
|
|
begin
|
|
location_reset(location,LOC_REGISTER,OS_ADDR);
|
|
current_asmdata.getjumplabel(l1);
|
|
case left.location.loc of
|
|
LOC_CREGISTER,LOC_REGISTER:
|
|
begin
|
|
{$ifdef cpu_uses_separate_address_registers}
|
|
if getregtype(left.location.register)<>R_ADDRESSREGISTER then
|
|
begin
|
|
location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
|
|
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
|
|
left.location.register,location.register);
|
|
end
|
|
else
|
|
{$endif}
|
|
location.register := left.location.register;
|
|
end;
|
|
LOC_CREFERENCE,LOC_REFERENCE:
|
|
begin
|
|
location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
|
|
cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,location.register);
|
|
end;
|
|
else
|
|
internalerror(2002032214);
|
|
end;
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_ADDR,OC_NE,0,location.register,l1);
|
|
{ FPC_EMPTYCHAR is a widechar -> 2 bytes }
|
|
reference_reset(hr,2);
|
|
hr.symbol:=current_asmdata.RefAsmSymbol('FPC_EMPTYCHAR');
|
|
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,hr,location.register);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end;
|
|
|
|
|
|
procedure tcgtypeconvnode.second_class_to_intf;
|
|
var
|
|
l1 : tasmlabel;
|
|
hd : tobjectdef;
|
|
ImplIntf : TImplementedInterface;
|
|
begin
|
|
location_reset(location,LOC_REGISTER,OS_ADDR);
|
|
case left.location.loc of
|
|
LOC_CREFERENCE,
|
|
LOC_REFERENCE:
|
|
begin
|
|
location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
|
|
cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,location.register);
|
|
location_freetemp(current_asmdata.CurrAsmList,left.location);
|
|
end;
|
|
LOC_CREGISTER:
|
|
begin
|
|
location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
|
|
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.register);
|
|
end;
|
|
LOC_REGISTER:
|
|
location.register:=left.location.register;
|
|
else
|
|
internalerror(121120001);
|
|
end;
|
|
hd:=tobjectdef(left.resultdef);
|
|
while assigned(hd) do
|
|
begin
|
|
ImplIntf:=hd.find_implemented_interface(tobjectdef(resultdef));
|
|
if assigned(ImplIntf) then
|
|
begin
|
|
case ImplIntf.IType of
|
|
etStandard:
|
|
begin
|
|
current_asmdata.getjumplabel(l1);
|
|
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_ADDR,OC_EQ,0,location.register,l1);
|
|
cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,ImplIntf.ioffset,location.register);
|
|
break;
|
|
end;
|
|
else
|
|
internalerror(200802163);
|
|
end;
|
|
end;
|
|
hd:=hd.childof;
|
|
end;
|
|
if hd=nil then
|
|
internalerror(2002081301);
|
|
cg.a_label(current_asmdata.CurrAsmList,l1);
|
|
end;
|
|
|
|
|
|
procedure tcgtypeconvnode.second_char_to_char;
|
|
begin
|
|
internalerror(2007081202);
|
|
end;
|
|
|
|
|
|
procedure tcgtypeconvnode.second_nothing;
|
|
var
|
|
newsize : tcgsize;
|
|
begin
|
|
{ we reuse the old value }
|
|
location_copy(location,left.location);
|
|
|
|
{ Floats should never be returned as LOC_CONSTANT, do the
|
|
moving to memory before the new size is set.
|
|
Also when converting from a float to a non-float
|
|
or the other way round, move to memory first to prevent
|
|
invalid LOC_FPUREGISTER locations }
|
|
if (
|
|
(resultdef.typ=floatdef) and
|
|
(location.loc=LOC_CONSTANT)
|
|
) or
|
|
(
|
|
(left.resultdef.typ=floatdef) xor
|
|
(resultdef.typ=floatdef)
|
|
) then
|
|
location_force_mem(current_asmdata.CurrAsmList,location);
|
|
|
|
{ but use the new size, but we don't know the size of all arrays }
|
|
newsize:=def_cgsize(resultdef);
|
|
location.size:=newsize;
|
|
end;
|
|
|
|
|
|
{$ifdef TESTOBJEXT2}
|
|
procedure tcgtypeconvnode.checkobject;
|
|
begin
|
|
{ no checking by default }
|
|
end;
|
|
{$endif TESTOBJEXT2}
|
|
|
|
|
|
procedure tcgtypeconvnode.pass_generate_code;
|
|
begin
|
|
{ the boolean routines can be called with LOC_JUMP and
|
|
call secondpass themselves in the helper }
|
|
if not(convtype in [tc_bool_2_int,tc_bool_2_bool,tc_int_2_bool]) then
|
|
begin
|
|
secondpass(left);
|
|
if codegenerror then
|
|
exit;
|
|
end;
|
|
|
|
second_call_helper(convtype);
|
|
|
|
{$ifdef TESTOBJEXT2}
|
|
{ Check explicit conversions to objects pointers !! }
|
|
if p^.explizit and
|
|
(p^.resultdef.typ=pointerdef) and
|
|
(tpointerdef(p^.resultdef).definition.typ=objectdef) and not
|
|
(tobjectdef(tpointerdef(p^.resultdef).definition).isclass) and
|
|
((tobjectdef(tpointerdef(p^.resultdef).definition).options and oo_hasvmt)<>0) and
|
|
(cs_check_range in current_settings.localswitches) then
|
|
checkobject;
|
|
{$endif TESTOBJEXT2}
|
|
end;
|
|
|
|
|
|
procedure tcgasnode.pass_generate_code;
|
|
begin
|
|
secondpass(call);
|
|
location_copy(location,call.location);
|
|
end;
|
|
|
|
|
|
begin
|
|
ctypeconvnode := tcgtypeconvnode;
|
|
casnode := tcgasnode;
|
|
end.
|