fpc/compiler/x86
nickysn c9d2028ebd * handle LOC_(C)SUBSETREG/REF in second_NegNot_assign
* changed the way OP_NEG and OP_NOT are handled in op_reg_ref, in order to be
  consistent with op_reg_reg
* introduced op_reg,op_ref,op_subsetreg,op_subsetref and op_loc for the unary
  operations only (OP_NEG,OP_NOT)

git-svn-id: trunk@45302 -
(cherry picked from commit 0f6ab0de17)

# Conflicts:
#	compiler/cgobj.pas
2021-10-24 12:40:38 +02:00
..
aasmcpu.pas
agx86att.pas
agx86int.pas
agx86nsm.pas
aoptx86.pas * x86: Fixed update of used registers in the CMOV optimizations. 2021-10-05 22:09:39 +03:00
cga.pas
cgx86.pas * handle LOC_(C)SUBSETREG/REF in second_NegNot_assign 2021-10-24 12:40:38 +02:00
cpubase.pas
cx86innr.inc
hlcgx86.pas
itcpugas.pas
itx86int.pas
ni86mem.pas
nx86add.pas
nx86cal.pas
nx86cnv.pas * Patch by J. Gareth "Kit" Moreton (issue #39343). Added missing allocation 2021-09-07 21:37:19 +02:00
nx86con.pas
nx86inl.pas * properly handle result size for avx/sse based frac function, resolves #38248 2021-08-24 23:26:25 +02:00
nx86ld.pas
nx86mat.pas
nx86mem.pas
nx86set.pas * let all the case code generation work with tconstexprint instead of aint, 2021-08-26 23:28:28 +02:00
rax86.pas
rax86att.pas
rax86int.pas
rgx86.pas * fix spilling of (v)min/max/s/ps/d operations 2021-08-24 00:08:44 +02:00
symi86.pas
symx86.pas
x86ins.dat * prefetch instructions read only the operand 2021-08-24 00:06:20 +02:00
x86reg.dat