mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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445 lines
16 KiB
ObjectPascal
445 lines
16 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by Florian Klaempfl and Jonas Maebe
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Code generation for add nodes on the Motorola 680x0 family
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncpuadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,ncgadd,cpubase,cginfo;
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type
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t68kaddnode = class(tcgaddnode)
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procedure second_cmpordinal;override;
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procedure second_cmpsmallset;override;
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procedure second_cmp64bit;override;
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procedure second_cmpboolean;override;
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private
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function getresflags(unsigned: boolean) : tresflags;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,paramgr,
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aasmbase,aasmtai,aasmcpu,defutil,htypechk,
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cgbase,cpuinfo,pass_1,pass_2,regvars,
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cpupara,
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ncon,nset,
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ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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function t68kaddnode.getresflags(unsigned : boolean) : tresflags;
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begin
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case nodetype of
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equaln : getresflags:=F_E;
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unequaln : getresflags:=F_NE;
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else
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if not(unsigned) then
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begin
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if nf_swaped in flags then
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case nodetype of
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ltn : getresflags:=F_G;
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lten : getresflags:=F_GE;
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gtn : getresflags:=F_L;
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gten : getresflags:=F_LE;
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end
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else
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case nodetype of
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ltn : getresflags:=F_L;
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lten : getresflags:=F_LE;
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gtn : getresflags:=F_G;
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gten : getresflags:=F_GE;
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end;
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end
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else
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begin
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if nf_swaped in flags then
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case nodetype of
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ltn : getresflags:=F_A;
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lten : getresflags:=F_AE;
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gtn : getresflags:=F_B;
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gten : getresflags:=F_BE;
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end
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else
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case nodetype of
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ltn : getresflags:=F_B;
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lten : getresflags:=F_BE;
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gtn : getresflags:=F_A;
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gten : getresflags:=F_AE;
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end;
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end;
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end;
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end;
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{*****************************************************************************
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Smallsets
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*****************************************************************************}
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procedure t68kaddnode.second_cmpsmallset;
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var
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tmpreg : tregister;
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begin
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location_reset(location,LOC_FLAGS,OS_NO);
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case nodetype of
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equaln,
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unequaln :
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begin
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{emit_compare(true);}
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end;
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lten,gten:
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begin
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If (not(nf_swaped in flags) and
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(nodetype = lten)) or
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((nf_swaped in flags) and
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(nodetype = gten)) then
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swapleftright;
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// now we have to check whether left >= right
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tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
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if left.location.loc = LOC_CONSTANT then
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begin
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cg.a_op_const_reg_reg(exprasmlist,OP_AND,OS_INT,
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not(left.location.value),right.location.register,tmpreg);
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exprasmlist.concat(taicpu.op_reg(A_TST,S_L,tmpreg));
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// the two instructions above should be folded together by
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// the peepholeoptimizer
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end
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else
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begin
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if right.location.loc = LOC_CONSTANT then
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begin
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cg.a_load_const_reg(exprasmlist,OS_INT,
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aword(right.location.value),tmpreg);
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exprasmlist.concat(taicpu.op_reg_reg(A_AND,S_L,
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tmpreg,left.location.register));
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end
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else
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exprasmlist.concat(taicpu.op_reg_reg(A_AND,S_L,
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right.location.register,left.location.register));
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end;
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cg.free_scratch_reg(exprasmlist,tmpreg);
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location.resflags := getresflags(true);
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end;
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else
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internalerror(2002072701);
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end;
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end;
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{*****************************************************************************
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Ordinals
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*****************************************************************************}
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procedure t68kaddnode.second_cmpordinal;
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var
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unsigned : boolean;
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useconst : boolean;
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tmpreg : tregister;
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op : tasmop;
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begin
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{ set result location }
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location_reset(location,LOC_JUMP,OS_NO);
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{ load values into registers (except constants) }
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load_left_right(true, false);
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{ determine if the comparison will be unsigned }
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unsigned:=not(is_signed(left.resulttype.def)) or
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not(is_signed(right.resulttype.def));
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// get the constant on the right if there is one
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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// can we use an immediate, or do we have to load the
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// constant in a register first?
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if (right.location.loc = LOC_CONSTANT) then
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begin
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{$ifdef extdebug}
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if (right.location.size in [OS_64,OS_S64]) and (hi(right.location.valueqword)<>0) and ((hi(right.location.valueqword)<>-1) or unsigned) then
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internalerror(2002080301);
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{$endif extdebug}
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if (nodetype in [equaln,unequaln]) then
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if (unsigned and
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(right.location.value > high(word))) or
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(not unsigned and
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(longint(right.location.value) < low(smallint)) or
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(longint(right.location.value) > high(smallint))) then
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{ we can then maybe use a constant in the 'othersigned' case
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(the sign doesn't matter for // equal/unequal)}
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unsigned := not unsigned;
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if (unsigned and
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((right.location.value) <= high(word))) or
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(not(unsigned) and
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(longint(right.location.value) >= low(smallint)) and
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(longint(right.location.value) <= high(smallint))) then
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useconst := true
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else
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begin
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useconst := false;
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tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
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cg.a_load_const_reg(exprasmlist,OS_INT,
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aword(right.location.value),tmpreg);
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end
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end
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else
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useconst := false;
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location.loc := LOC_FLAGS;
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location.resflags := getresflags(unsigned);
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op := A_CMP;
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if (right.location.loc = LOC_CONSTANT) then
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if useconst then
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exprasmlist.concat(taicpu.op_reg_const(op,S_L,
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left.location.register,longint(right.location.value)))
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else
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begin
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exprasmlist.concat(taicpu.op_reg_reg(op,S_L,
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left.location.register,tmpreg));
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cg.free_scratch_reg(exprasmlist,tmpreg);
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end
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else
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exprasmlist.concat(taicpu.op_reg_reg(op,S_L,
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left.location.register,right.location.register));
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end;
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{*****************************************************************************
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Boolean
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*****************************************************************************}
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procedure t68kaddnode.second_cmpboolean;
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var
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cgop : TOpCg;
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cgsize : TCgSize;
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isjump : boolean;
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otl,ofl : tasmlabel;
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pushedregs : tmaybesave;
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begin
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if (torddef(left.resulttype.def).typ=bool8bit) or
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(torddef(right.resulttype.def).typ=bool8bit) then
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cgsize:=OS_8
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else
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if (torddef(left.resulttype.def).typ=bool16bit) or
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(torddef(right.resulttype.def).typ=bool16bit) then
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cgsize:=OS_16
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else
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cgsize:=OS_32;
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if (cs_full_boolean_eval in aktlocalswitches) or
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(nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
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begin
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if left.nodetype in [ordconstn,realconstn] then
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swapleftright;
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isjump:=(left.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,left.location,cgsize,false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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isjump:=(right.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,right.location,cgsize,false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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location_reset(location,LOC_FLAGS,OS_NO);
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load_left_right(true,false);
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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if (right.location.loc <> LOC_CONSTANT) then
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exprasmlist.concat(taicpu.op_reg_reg(A_CMP,S_L,
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left.location.register,right.location.register))
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else
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exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,
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longint(right.location.value),left.location.register));
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location.resflags := getresflags(true);
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end;
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clear_left_right(true);
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end;
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{*****************************************************************************
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64-bit
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*****************************************************************************}
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procedure t68kaddnode.second_cmp64bit;
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begin
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(* load_left_right(true,false);
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case nodetype of
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ltn,lten,
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gtn,gten:
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begin
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emit_cmp64_hi;
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firstjmp64bitcmp;
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emit_cmp64_lo;
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secondjmp64bitcmp;
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end;
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equaln,unequaln:
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begin
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// instead of doing a complicated compare, do
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// (left.hi xor right.hi) or (left.lo xor right.lo)
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// (somewhate optimized so that no superfluous 'mr's are
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// generated)
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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if (right.location.loc = LOC_CONSTANT) then
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begin
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if left.location.loc = LOC_REGISTER then
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begin
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tempreg64.reglo := left.location.registerlow;
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tempreg64.reghi := left.location.registerhigh;
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end
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else
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begin
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if (aword(right.location.valueqword) <> 0) then
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tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist)
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else
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tempreg64.reglo := left.location.registerlow;
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if ((right.location.valueqword shr 32) <> 0) then
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tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist)
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else
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tempreg64.reghi := left.location.registerhigh;
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end;
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if (aword(right.location.valueqword) <> 0) then
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{ negative values can be handled using SUB, }
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{ positive values < 65535 using XOR. }
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if (longint(right.location.valueqword) >= -32767) and
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(longint(right.location.valueqword) < 0) then
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cg.a_op_const_reg_reg(exprasmlist,OP_SUB,OS_INT,
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aword(right.location.valueqword),
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left.location.registerlow,tempreg64.reglo)
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else
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cg.a_op_const_reg_reg(exprasmlist,OP_XOR,OS_INT,
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aword(right.location.valueqword),
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left.location.registerlow,tempreg64.reglo);
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if ((right.location.valueqword shr 32) <> 0) then
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if (longint(right.location.valueqword shr 32) >= -32767) and
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(longint(right.location.valueqword shr 32) < 0) then
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cg.a_op_const_reg_reg(exprasmlist,OP_SUB,OS_INT,
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aword(right.location.valueqword shr 32),
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left.location.registerhigh,tempreg64.reghi)
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else
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cg.a_op_const_reg_reg(exprasmlist,OP_XOR,OS_INT,
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aword(right.location.valueqword shr 32),
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left.location.registerhigh,tempreg64.reghi);
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end
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else
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begin
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tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist);
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tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist);
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cg64.a_op64_reg_reg_reg(exprasmlist,OP_XOR,
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left.location.register64,right.location.register64,
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tempreg64);
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end;
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cg.a_reg_alloc(exprasmlist,R_0);
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR_,R_0,
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tempreg64.reglo,tempreg64.reghi));
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cg.a_reg_dealloc(exprasmlist,R_0);
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if (tempreg64.reglo <> left.location.registerlow) then
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cg.free_scratch_reg(exprasmlist,tempreg64.reglo);
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if (tempreg64.reghi <> left.location.registerhigh) then
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cg.free_scratch_reg(exprasmlist,tempreg64.reghi);
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags := getresflags;
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end;
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else
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internalerror(2002072803);
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end;
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{ set result location }
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{ (emit_compare sets it to LOC_FLAGS for compares, so set the }
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{ real location only now) (JM) }
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if cmpop and
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not(nodetype in [equaln,unequaln]) then
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location_reset(location,LOC_JUMP,OS_NO);
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*)
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location_reset(location,LOC_JUMP,OS_NO);
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end;
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begin
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caddnode:=t68kaddnode;
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end.
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{
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$Log$
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Revision 1.2 2003-02-19 22:00:16 daniel
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* Code generator converted to new register notation
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- Horribily outdated todo.txt removed
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Revision 1.1 2003/02/02 19:25:54 carl
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* Several bugfixes for m68k target (register alloc., opcode emission)
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+ VIS target
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+ Generic add more complete (still not verified)
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}
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