mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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290 lines
8.3 KiB
ObjectPascal
290 lines
8.3 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by Florian Klaempfl
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Code generation for add nodes on the SPARC
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncpuadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,ncgadd,cpubase;
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type
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tsparcaddnode = class(tcgaddnode)
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private
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function GetResFlags(unsigned:Boolean):TResFlags;
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protected
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procedure second_addfloat;override;
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procedure second_cmpfloat;override;
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procedure second_cmpboolean;override;
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procedure second_cmpsmallset;override;
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procedure second_cmp64bit;override;
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procedure second_cmpordinal;override;
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end;
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implementation
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uses
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systems,
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cutils,verbose,
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paramgr,
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aasmtai,aasmcpu,defutil,
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cgbase,cgcpu,
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cpupara,
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ncon,nset,nadd,
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ncgutil,cgobj;
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{*****************************************************************************
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TSparcAddNode
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*****************************************************************************}
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function TSparcAddNode.GetResFlags(unsigned:Boolean):TResFlags;
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begin
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case NodeType of
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equaln:
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GetResFlags:=F_E;
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unequaln:
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GetResFlags:=F_NE;
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else
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if not(unsigned) then
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begin
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if nf_swaped in flags then
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case NodeType of
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ltn:
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GetResFlags:=F_G;
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lten:
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GetResFlags:=F_GE;
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gtn:
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GetResFlags:=F_L;
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gten:
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GetResFlags:=F_LE;
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end
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else
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case NodeType of
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ltn:
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GetResFlags:=F_L;
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lten:
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GetResFlags:=F_LE;
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gtn:
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GetResFlags:=F_G;
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gten:
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GetResFlags:=F_GE;
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end;
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end
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else
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begin
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if nf_swaped in Flags then
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case NodeType of
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ltn:
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GetResFlags:=F_A;
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lten:
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GetResFlags:=F_AE;
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gtn:
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GetResFlags:=F_B;
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gten:
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GetResFlags:=F_BE;
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end
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else
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case NodeType of
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ltn:
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GetResFlags:=F_B;
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lten:
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GetResFlags:=F_BE;
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gtn:
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GetResFlags:=F_A;
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gten:
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GetResFlags:=F_AE;
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end;
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end;
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end;
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end;
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procedure tsparcaddnode.second_addfloat;
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var
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op : TAsmOp;
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begin
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pass_left_right;
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if (nf_swaped in flags) then
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swapleftright;
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case nodetype of
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addn :
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op:=A_FADDs;
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muln :
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op:=A_FMULs;
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subn :
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op:=A_FSUBs;
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slashn :
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op:=A_FDIVs;
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else
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internalerror(200306014);
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end;
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{ force fpureg as location, left right doesn't matter
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as both will be in a fpureg }
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location_force_fpureg(exprasmlist,left.location,true);
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location_force_fpureg(exprasmlist,right.location,(left.location.loc<>LOC_CFPUREGISTER));
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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if left.location.loc<>LOC_CFPUREGISTER then
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location.register:=left.location.register
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else
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location.register:=right.location.register;
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exprasmlist.concat(taicpu.op_reg_reg_reg(op,
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left.location.register,right.location.register,location.register));
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release_reg_left_right;
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end;
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procedure tsparcaddnode.second_cmpfloat;
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begin
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pass_left_right;
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if (nf_swaped in flags) then
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swapleftright;
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{ force fpureg as location, left right doesn't matter
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as both will be in a fpureg }
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location_force_fpureg(exprasmlist,left.location,true);
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location_force_fpureg(exprasmlist,right.location,true);
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=getresflags(true);
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exprasmlist.concat(taicpu.op_reg_reg(A_FCMPs,
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left.location.register,right.location.register));
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{ Delay slot (can only contain integer operation) }
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exprasmlist.concat(taicpu.op_none(A_NOP));
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release_reg_left_right;
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end;
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procedure tsparcaddnode.second_cmpboolean;
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begin
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pass_left_right;
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force_reg_left_right(true,true);
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if right.location.loc = LOC_CONSTANT then
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tcgsparc(cg).handle_reg_const_reg(exprasmlist,A_SUBcc,left.location.register,right.location.value,NR_G0)
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else
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBcc,left.location.register,right.location.register,NR_G0));
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=getresflags(true);
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release_reg_left_right;
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end;
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procedure tsparcaddnode.second_cmpsmallset;
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begin
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pass_left_right;
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force_reg_left_right(true,true);
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if right.location.loc = LOC_CONSTANT then
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tcgsparc(cg).handle_reg_const_reg(exprasmlist,A_SUBcc,left.location.register,right.location.value,NR_G0)
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else
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBcc,left.location.register,right.location.register,NR_G0));
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=getresflags(true);
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release_reg_left_right;
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end;
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procedure tsparcaddnode.second_cmp64bit;
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var
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unsigned : boolean;
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begin
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{$warning TODO 64bit compare}
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unsigned:=not(is_signed(left.resulttype.def)) or
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not(is_signed(right.resulttype.def));
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=getresflags(unsigned);
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release_reg_left_right;
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end;
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procedure tsparcaddnode.second_cmpordinal;
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var
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unsigned : boolean;
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begin
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pass_left_right;
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force_reg_left_right(true,true);
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unsigned:=not(is_signed(left.resulttype.def)) or
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not(is_signed(right.resulttype.def));
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if right.location.loc = LOC_CONSTANT then
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tcgsparc(cg).handle_reg_const_reg(exprasmlist,A_SUBcc,left.location.register,right.location.value,NR_G0)
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else
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBcc,left.location.register,right.location.register,NR_G0));
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=getresflags(unsigned);
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release_reg_left_right;
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end;
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begin
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caddnode:=tsparcaddnode;
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end.
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{
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$Log$
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Revision 1.21 2003-10-24 11:28:35 mazen
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-unused units removed from uses clause
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Revision 1.20 2003/10/01 20:34:50 peter
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* procinfo unit contains tprocinfo
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* cginfo renamed to cgbase
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* moved cgmessage to verbose
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* fixed ppc and sparc compiles
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Revision 1.19 2003/09/03 15:55:01 peter
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* NEWRA branch merged
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Revision 1.18.2.1 2003/09/01 21:02:55 peter
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* sparc updates for new tregister
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Revision 1.18 2003/07/08 21:25:00 peter
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* sparc fixes
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Revision 1.17 2003/07/06 22:09:50 peter
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* signed compare fixed
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Revision 1.16 2003/07/06 17:44:12 peter
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* cleanup and first sparc implementation
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Revision 1.15 2003/06/01 21:38:06 peter
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* getregisterfpu size parameter added
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* op_const_reg size parameter added
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* sparc updates
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}
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