fpc/compiler/arm/cpupi.pas
Jonas Maebe d1538ab023 o added ARM VPFv2/VFPv3 support:
+ RTL support:
      o VFP exceptions are disabled by default on Darwin,
        because they cause kernel panics on iPhoneOS 2.2.1 at least
      o all denormals are truncated to 0 on Darwin, because disabling
        that also causes kernel panics on iPhoneOS 2.2.1 (probably
        because otherwise denormals can also cause exceptions)
    * set softfloat rounding mode correctly for non-wince/darwin/vfp
      targets
    + compiler support: only half the number of single precision
      registers is available due to limitations of the register
      allocator
    + added a number of comments about why the stackframe on ARM is
      set up the way it is by the compiler
    + added regtype and subregtype info to regsets, because they're
      also used for VFP registers (+ support in assembler reader)
    + various generic support routines for dealing with floating point
      values located in integer registers that have to be transferred to
      mm registers (needed for VFP)
    * renamed use_sse() to use_vectorfpu() and also use it for
      ARM/vfp support
    o only superficially tested for Linux (compiler compiled with -Cpvfpv6
      -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
      the fpu exception handler still needs to be implemented), Darwin has
      been tested more thoroughly
  + added ARMv6 cpu type and made it default for Darwin/ARM
  + ARMv6+ implementations of atomic operations using ldrex/strex
  * don't use r9 on Darwin/ARM, as it's reserved under certain
    circumstances (don't know yet which ones)
  * changed C-test object files for ARM/Darwin to ARMv6 versions
  * check in assembler reader that regsets are not empty, because
    instructions with a regset operand have undefined behaviour in that
    case
  * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
    int64->single type conversion
  * fixed constant pool locations in case 64 bit constants are generated,
    and/or when vfp instructions with limited reach are present

  WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
    code with -Cparmv6 (or higher), or you will get crashes. The reason is
    that storing/restoring multiple VFP registers must happen using
    different instructions on pre/post-ARMv6.

git-svn-id: trunk@14317 -
2009-12-03 22:46:30 +00:00

129 lines
4.4 KiB
ObjectPascal

{
Copyright (c) 2002 by Florian Klaempfl
This unit contains the CPU specific part of tprocinfo
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
****************************************************************************
}
{ This unit contains the CPU specific part of tprocinfo. }
unit cpupi;
{$i fpcdefs.inc}
interface
uses
globtype,cutils,
procinfo,cpuinfo,psub;
type
tarmprocinfo = class(tcgprocinfo)
floatregstart : aint;
// procedure handle_body_start;override;
// procedure after_pass1;override;
procedure set_first_temp_offset;override;
function calc_stackframe_size:longint;override;
end;
implementation
uses
globals,systems,
cpubase,
aasmtai,aasmdata,
tgobj,
symconst,symsym,paramgr,
cgbase,
cgobj;
procedure tarmprocinfo.set_first_temp_offset;
begin
{ We allocate enough space to save all registers because we can't determine
the necessary space because the used registers aren't known before
secondpass is run. Even worse, patching
the local offsets after generating the code could cause trouble because
"shifter" constants could change to non-"shifter" constants. This
is especially a problem when taking the address of a local. For now,
this extra memory should hurt less than generating all local contants with offsets
>256 as non shifter constants }
if tg.direction = -1 then
begin
if (target_info.system<>system_arm_darwin) then
{ Non-Darwin, worst case: r4-r10,r11,r13,r14,r15 is saved -> -28-16, but we
always adjust the frame pointer to point to the first stored
register (= last register in list above) -> + 4 }
tg.setfirsttemp(-28-16+4)
else
{ on Darwin r9 is not usable -> one less register to save }
tg.setfirsttemp(-24-16+4)
end
else
tg.setfirsttemp(maxpushedparasize);
end;
function tarmprocinfo.calc_stackframe_size:longint;
var
firstfloatreg,lastfloatreg,
r : byte;
floatsavesize : aword;
regs: tcpuregisterset;
begin
maxpushedparasize:=align(maxpushedparasize,max(current_settings.alignment.localalignmin,4));
floatsavesize:=0;
case current_settings.fputype of
fpu_fpa,
fpu_fpa10,
fpu_fpa11:
begin
{ save floating point registers? }
firstfloatreg:=RS_NO;
regs:=cg.rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall);
for r:=RS_F0 to RS_F7 do
if r in regs then
begin
if firstfloatreg=RS_NO then
firstfloatreg:=r;
lastfloatreg:=r;
end;
if firstfloatreg<>RS_NO then
floatsavesize:=(lastfloatreg-firstfloatreg+1)*12;
end;
fpu_vfpv2,
fpu_vfpv3:
begin
floatsavesize:=0;
regs:=cg.rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall);
for r:=RS_D0 to RS_D31 do
if r in regs then
inc(floatsavesize,8);
end;
end;
floatsavesize:=align(floatsavesize,max(current_settings.alignment.localalignmin,4));
result:=Align(tg.direction*tg.lasttemp,max(current_settings.alignment.localalignmin,4))+maxpushedparasize+aint(floatsavesize);
floatregstart:=tg.direction*result+maxpushedparasize;
if tg.direction=1 then
dec(floatregstart,floatsavesize);
end;
begin
cprocinfo:=tarmprocinfo;
end.