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https://gitlab.com/freepascal.org/fpc/source.git
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+ RTL support: o VFP exceptions are disabled by default on Darwin, because they cause kernel panics on iPhoneOS 2.2.1 at least o all denormals are truncated to 0 on Darwin, because disabling that also causes kernel panics on iPhoneOS 2.2.1 (probably because otherwise denormals can also cause exceptions) * set softfloat rounding mode correctly for non-wince/darwin/vfp targets + compiler support: only half the number of single precision registers is available due to limitations of the register allocator + added a number of comments about why the stackframe on ARM is set up the way it is by the compiler + added regtype and subregtype info to regsets, because they're also used for VFP registers (+ support in assembler reader) + various generic support routines for dealing with floating point values located in integer registers that have to be transferred to mm registers (needed for VFP) * renamed use_sse() to use_vectorfpu() and also use it for ARM/vfp support o only superficially tested for Linux (compiler compiled with -Cpvfpv6 -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least the fpu exception handler still needs to be implemented), Darwin has been tested more thoroughly + added ARMv6 cpu type and made it default for Darwin/ARM + ARMv6+ implementations of atomic operations using ldrex/strex * don't use r9 on Darwin/ARM, as it's reserved under certain circumstances (don't know yet which ones) * changed C-test object files for ARM/Darwin to ARMv6 versions * check in assembler reader that regsets are not empty, because instructions with a regset operand have undefined behaviour in that case * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of int64->single type conversion * fixed constant pool locations in case 64 bit constants are generated, and/or when vfp instructions with limited reach are present WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all code with -Cparmv6 (or higher), or you will get crashes. The reason is that storing/restoring multiple VFP registers must happen using different instructions on pre/post-ARMv6. git-svn-id: trunk@14317 -
129 lines
4.4 KiB
ObjectPascal
129 lines
4.4 KiB
ObjectPascal
{
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Copyright (c) 2002 by Florian Klaempfl
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This unit contains the CPU specific part of tprocinfo
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{ This unit contains the CPU specific part of tprocinfo. }
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unit cpupi;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,cutils,
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procinfo,cpuinfo,psub;
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type
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tarmprocinfo = class(tcgprocinfo)
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floatregstart : aint;
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// procedure handle_body_start;override;
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// procedure after_pass1;override;
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procedure set_first_temp_offset;override;
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function calc_stackframe_size:longint;override;
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end;
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implementation
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uses
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globals,systems,
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cpubase,
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aasmtai,aasmdata,
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tgobj,
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symconst,symsym,paramgr,
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cgbase,
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cgobj;
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procedure tarmprocinfo.set_first_temp_offset;
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begin
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{ We allocate enough space to save all registers because we can't determine
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the necessary space because the used registers aren't known before
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secondpass is run. Even worse, patching
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the local offsets after generating the code could cause trouble because
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"shifter" constants could change to non-"shifter" constants. This
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is especially a problem when taking the address of a local. For now,
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this extra memory should hurt less than generating all local contants with offsets
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>256 as non shifter constants }
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if tg.direction = -1 then
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begin
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if (target_info.system<>system_arm_darwin) then
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{ Non-Darwin, worst case: r4-r10,r11,r13,r14,r15 is saved -> -28-16, but we
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always adjust the frame pointer to point to the first stored
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register (= last register in list above) -> + 4 }
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tg.setfirsttemp(-28-16+4)
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else
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{ on Darwin r9 is not usable -> one less register to save }
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tg.setfirsttemp(-24-16+4)
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end
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else
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tg.setfirsttemp(maxpushedparasize);
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end;
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function tarmprocinfo.calc_stackframe_size:longint;
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var
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firstfloatreg,lastfloatreg,
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r : byte;
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floatsavesize : aword;
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regs: tcpuregisterset;
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begin
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maxpushedparasize:=align(maxpushedparasize,max(current_settings.alignment.localalignmin,4));
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floatsavesize:=0;
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case current_settings.fputype of
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fpu_fpa,
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fpu_fpa10,
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fpu_fpa11:
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begin
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{ save floating point registers? }
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firstfloatreg:=RS_NO;
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regs:=cg.rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall);
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for r:=RS_F0 to RS_F7 do
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if r in regs then
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begin
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if firstfloatreg=RS_NO then
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firstfloatreg:=r;
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lastfloatreg:=r;
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end;
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if firstfloatreg<>RS_NO then
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floatsavesize:=(lastfloatreg-firstfloatreg+1)*12;
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end;
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fpu_vfpv2,
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fpu_vfpv3:
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begin
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floatsavesize:=0;
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regs:=cg.rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall);
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for r:=RS_D0 to RS_D31 do
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if r in regs then
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inc(floatsavesize,8);
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end;
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end;
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floatsavesize:=align(floatsavesize,max(current_settings.alignment.localalignmin,4));
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result:=Align(tg.direction*tg.lasttemp,max(current_settings.alignment.localalignmin,4))+maxpushedparasize+aint(floatsavesize);
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floatregstart:=tg.direction*result+maxpushedparasize;
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if tg.direction=1 then
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dec(floatregstart,floatsavesize);
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end;
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begin
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cprocinfo:=tarmprocinfo;
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end.
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