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fpc/compiler/arm/rgcpu.pas
Jonas Maebe d1538ab023 o added ARM VPFv2/VFPv3 support: 
+ RTL support:
      o VFP exceptions are disabled by default on Darwin,
        because they cause kernel panics on iPhoneOS 2.2.1 at least
      o all denormals are truncated to 0 on Darwin, because disabling
        that also causes kernel panics on iPhoneOS 2.2.1 (probably
        because otherwise denormals can also cause exceptions)
    * set softfloat rounding mode correctly for non-wince/darwin/vfp
      targets
    + compiler support: only half the number of single precision
      registers is available due to limitations of the register
      allocator
    + added a number of comments about why the stackframe on ARM is
      set up the way it is by the compiler
    + added regtype and subregtype info to regsets, because they're
      also used for VFP registers (+ support in assembler reader)
    + various generic support routines for dealing with floating point
      values located in integer registers that have to be transferred to
      mm registers (needed for VFP)
    * renamed use_sse() to use_vectorfpu() and also use it for
      ARM/vfp support
    o only superficially tested for Linux (compiler compiled with -Cpvfpv6
      -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
      the fpu exception handler still needs to be implemented), Darwin has
      been tested more thoroughly
  + added ARMv6 cpu type and made it default for Darwin/ARM
  + ARMv6+ implementations of atomic operations using ldrex/strex
  * don't use r9 on Darwin/ARM, as it's reserved under certain
    circumstances (don't know yet which ones)
  * changed C-test object files for ARM/Darwin to ARMv6 versions
  * check in assembler reader that regsets are not empty, because
    instructions with a regset operand have undefined behaviour in that
    case
  * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
    int64->single type conversion
  * fixed constant pool locations in case 64 bit constants are generated,
    and/or when vfp instructions with limited reach are present

  WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
    code with -Cparmv6 (or higher), or you will get crashes. The reason is
    that storing/restoring multiple VFP registers must happen using
    different instructions on pre/post-ARMv6.

git-svn-id: trunk@14317 -
2009-12-03 22:46:30 +00:00

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{
Copyright (c) 1998-2003 by Florian Klaempfl
This unit implements the arm specific class for the register
allocator
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
****************************************************************************
}
unit rgcpu;
{$i fpcdefs.inc}
interface
uses
aasmbase,aasmtai,aasmdata,aasmcpu,
cgbase,cgutils,
cpubase,
rgobj;
type
trgcpu = class(trgobj)
procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
procedure add_constraints(reg:tregister);override;
function get_spill_subreg(r:tregister) : tsubregister;override;
end;
trgcputhumb2 = class(trgobj)
procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
end;
trgintcpu = class(trgcpu)
procedure add_cpu_interferences(p : tai);override;
end;
implementation
uses
verbose, cutils,globtype,
cgobj,
procinfo;
procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
var
tmpref : treference;
helplist : TAsmList;
l : tasmlabel;
hreg : tregister;
begin
{ don't load spilled register between
mov lr,pc
mov pc,r4
but befure the mov lr,pc
}
if assigned(pos.previous) and
(pos.typ=ait_instruction) and
(taicpu(pos).opcode=A_MOV) and
(taicpu(pos).oper[0]^.typ=top_reg) and
(taicpu(pos).oper[0]^.reg=NR_R14) and
(taicpu(pos).oper[1]^.typ=top_reg) and
(taicpu(pos).oper[1]^.reg=NR_PC) then
pos:=tai(pos.previous);
if abs(spilltemp.offset)>4095 then
begin
helplist:=TAsmList.create;
reference_reset(tmpref,sizeof(aint));
{ create consts entry }
current_asmdata.getjumplabel(l);
cg.a_label(current_procinfo.aktlocaldata,l);
tmpref.symboldata:=current_procinfo.aktlocaldata.last;
current_procinfo.aktlocaldata.concat(tai_const.Create_32bit(spilltemp.offset));
{ load consts entry }
if getregtype(tempreg)=R_INTREGISTER then
hreg:=getregisterinline(helplist,R_SUBWHOLE)
else
hreg:=cg.getintregister(helplist,OS_ADDR);
tmpref.symbol:=l;
tmpref.base:=NR_R15;
helplist.concat(taicpu.op_reg_ref(A_LDR,hreg,tmpref));
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(aint));
tmpref.index:=hreg;
if spilltemp.index<>NR_NO then
internalerror(200401263);
helplist.concat(spilling_create_load(tmpref,tempreg));
if getregtype(tempreg)=R_INTREGISTER then
ungetregisterinline(helplist,hreg);
list.insertlistafter(pos,helplist);
helplist.free;
end
else
inherited do_spill_read(list,pos,spilltemp,tempreg);
end;
procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
var
tmpref : treference;
helplist : TAsmList;
l : tasmlabel;
hreg : tregister;
begin
if abs(spilltemp.offset)>4095 then
begin
helplist:=TAsmList.create;
reference_reset(tmpref,sizeof(aint));
{ create consts entry }
current_asmdata.getjumplabel(l);
cg.a_label(current_procinfo.aktlocaldata,l);
tmpref.symboldata:=current_procinfo.aktlocaldata.last;
current_procinfo.aktlocaldata.concat(tai_const.Create_32bit(spilltemp.offset));
{ load consts entry }
if getregtype(tempreg)=R_INTREGISTER then
hreg:=getregisterinline(helplist,R_SUBWHOLE)
else
hreg:=cg.getintregister(helplist,OS_ADDR);
tmpref.symbol:=l;
tmpref.base:=NR_R15;
helplist.concat(taicpu.op_reg_ref(A_LDR,hreg,tmpref));
if spilltemp.index<>NR_NO then
internalerror(200401263);
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(pint));
tmpref.index:=hreg;
helplist.concat(spilling_create_store(tempreg,tmpref));
if getregtype(tempreg)=R_INTREGISTER then
ungetregisterinline(helplist,hreg);
list.insertlistafter(pos,helplist);
helplist.free;
end
else
inherited do_spill_written(list,pos,spilltemp,tempreg);
end;
procedure trgcpu.add_constraints(reg:tregister);
var
supreg,i : Tsuperregister;
begin
case getsubreg(reg) of
{ Let 32bit floats conflict with all double precision regs > 15
(since these don't have 32 bit equivalents) }
R_SUBFS:
begin
supreg:=getsupreg(reg);
for i:=RS_D16 to RS_D31 do
add_edge(supreg,i);
end;
end;
end;
function trgcpu.get_spill_subreg(r:tregister) : tsubregister;
begin
if (getregtype(r)<>R_MMREGISTER) then
result:=defaultsub
else
result:=getsubreg(r);
end;
procedure trgcputhumb2.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
var
tmpref : treference;
helplist : TAsmList;
l : tasmlabel;
hreg : tregister;
begin
{ don't load spilled register between
mov lr,pc
mov pc,r4
but befure the mov lr,pc
}
if assigned(pos.previous) and
(pos.typ=ait_instruction) and
(taicpu(pos).opcode=A_MOV) and
(taicpu(pos).oper[0]^.typ=top_reg) and
(taicpu(pos).oper[0]^.reg=NR_R14) and
(taicpu(pos).oper[1]^.typ=top_reg) and
(taicpu(pos).oper[1]^.reg=NR_PC) then
pos:=tai(pos.previous);
if (spilltemp.offset>4095) or (spilltemp.offset<-255) then
begin
helplist:=TAsmList.create;
reference_reset(tmpref,sizeof(aint));
{ create consts entry }
current_asmdata.getjumplabel(l);
cg.a_label(current_procinfo.aktlocaldata,l);
tmpref.symboldata:=current_procinfo.aktlocaldata.last;
current_procinfo.aktlocaldata.concat(tai_const.Create_32bit(spilltemp.offset));
{ load consts entry }
if getregtype(tempreg)=R_INTREGISTER then
hreg:=getregisterinline(helplist,R_SUBWHOLE)
else
hreg:=cg.getintregister(helplist,OS_ADDR);
tmpref.symbol:=l;
tmpref.base:=NR_R15;
helplist.concat(taicpu.op_reg_ref(A_LDR,hreg,tmpref));
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(aint));
tmpref.index:=hreg;
if spilltemp.index<>NR_NO then
internalerror(200401263);
helplist.concat(spilling_create_load(tmpref,tempreg));
if getregtype(tempreg)=R_INTREGISTER then
ungetregisterinline(helplist,hreg);
list.insertlistafter(pos,helplist);
helplist.free;
end
else
inherited do_spill_read(list,pos,spilltemp,tempreg);
end;
procedure trgcputhumb2.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
var
tmpref : treference;
helplist : TAsmList;
l : tasmlabel;
hreg : tregister;
begin
if (spilltemp.offset>4095) or (spilltemp.offset<-255) then
begin
helplist:=TAsmList.create;
reference_reset(tmpref,sizeof(aint));
{ create consts entry }
current_asmdata.getjumplabel(l);
cg.a_label(current_procinfo.aktlocaldata,l);
tmpref.symboldata:=current_procinfo.aktlocaldata.last;
current_procinfo.aktlocaldata.concat(tai_const.Create_32bit(spilltemp.offset));
{ load consts entry }
if getregtype(tempreg)=R_INTREGISTER then
hreg:=getregisterinline(helplist,R_SUBWHOLE)
else
hreg:=cg.getintregister(helplist,OS_ADDR);
tmpref.symbol:=l;
tmpref.base:=NR_R15;
helplist.concat(taicpu.op_reg_ref(A_LDR,hreg,tmpref));
if spilltemp.index<>NR_NO then
internalerror(200401263);
reference_reset_base(tmpref,current_procinfo.framepointer,0,sizeof(pint));
tmpref.index:=hreg;
helplist.concat(spilling_create_store(tempreg,tmpref));
if getregtype(tempreg)=R_INTREGISTER then
ungetregisterinline(helplist,hreg);
list.insertlistafter(pos,helplist);
helplist.free;
end
else
inherited do_spill_written(list,pos,spilltemp,tempreg);
end;
procedure trgintcpu.add_cpu_interferences(p : tai);
var
r : tregister;
begin
if p.typ=ait_instruction then
begin
case taicpu(p).opcode of
A_MUL:
add_edge(getsupreg(taicpu(p).oper[0]^.reg),getsupreg(taicpu(p).oper[1]^.reg));
A_UMULL,
A_UMLAL,
A_SMULL,
A_SMLAL:
begin
add_edge(getsupreg(taicpu(p).oper[0]^.reg),getsupreg(taicpu(p).oper[1]^.reg));
add_edge(getsupreg(taicpu(p).oper[1]^.reg),getsupreg(taicpu(p).oper[2]^.reg));
add_edge(getsupreg(taicpu(p).oper[0]^.reg),getsupreg(taicpu(p).oper[2]^.reg));
end;
A_LDRB,
A_STRB,
A_STR,
A_LDR,
A_LDRH,
A_STRH:
{ don't mix up the framepointer and stackpointer with pre/post indexed operations }
if (taicpu(p).oper[1]^.typ=top_ref) and
(taicpu(p).oper[1]^.ref^.addressmode in [AM_PREINDEXED,AM_POSTINDEXED]) then
begin
add_edge(getsupreg(taicpu(p).oper[1]^.ref^.base),getsupreg(current_procinfo.framepointer));
{ FIXME: temp variable r is needed here to avoid Internal error 20060521 }
{ while compiling the compiler. }
r:=NR_STACK_POINTER_REG;
if current_procinfo.framepointer<>r then
add_edge(getsupreg(taicpu(p).oper[1]^.ref^.base),getsupreg(r));
end;
end;
end;
end;
end.
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