mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-10-29 00:04:58 +01:00
426de6d36f
the result)
* optimized 'const64 - reg64/mem64'
* optimized equaln/unequaln with 64bit values (change them to
'(left.hi xor right.hi) or (left.lo xor right.lo)' so there are less
branches and the result can be returned in the flags this way. Could
be done for the i386 too probably.
1524 lines
54 KiB
ObjectPascal
1524 lines
54 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by Florian Klaempfl and Jonas Maebe
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Code generation for add nodes on the PowerPC
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nppcadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,cpubase,cginfo;
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type
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tppcaddnode = class(taddnode)
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function pass_1: tnode; override;
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procedure pass_2;override;
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private
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procedure pass_left_and_right;
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procedure load_left_right(cmpop, load_constants: boolean);
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procedure clear_left_right(cmpop: boolean);
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function getresflags : tresflags;
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procedure emit_compare(unsigned : boolean);
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procedure second_addfloat;
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procedure second_addboolean;
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procedure second_addsmallset;
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{$ifdef SUPPORT_MMX}
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procedure second_addmmx;
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{$endif SUPPORT_MMX}
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procedure second_add64bit;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,paramgr,
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aasmbase,aasmtai,aasmcpu,defbase,htypechk,
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cgbase,cpuinfo,pass_1,pass_2,regvars,
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cpupara,
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ncon,nset,
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cga,ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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{*****************************************************************************
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Pass 1
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*****************************************************************************}
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function tppcaddnode.pass_1: tnode;
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begin
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if (nodetype in [equaln,unequaln]) and
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is_64bitint(left.resulttype.def) then
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begin
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result := nil;
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firstpass(left);
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firstpass(right);
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location.loc := LOC_FLAGS;
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calcregisters(self,2,0,0);
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exit;
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end;
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result := inherited pass_1;
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end;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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procedure tppcaddnode.pass_left_and_right;
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var
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pushedregs : tmaybesave;
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tmpreg : tregister;
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pushedfpu : boolean;
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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{ in case of constant put it to the left }
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if (left.nodetype=ordconstn) then
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swapleftright;
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secondpass(left);
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{ are too few registers free? }
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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if location.loc=LOC_FPUREGISTER then
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pushedfpu:=maybe_pushfpu(exprasmlist,right.registersfpu,left.location)
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else
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pushedfpu:=false;
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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if pushedfpu then
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begin
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tmpreg := rg.getregisterfpu(exprasmlist);
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cg.a_loadfpu_loc_reg(exprasmlist,left.location,tmpreg);
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location_reset(left.location,LOC_FPUREGISTER,left.location.size);
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left.location.register := tmpreg;
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end;
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end;
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procedure tppcaddnode.load_left_right(cmpop, load_constants: boolean);
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procedure load_node(var n: tnode);
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begin
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case n.location.loc of
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LOC_REGISTER:
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if not cmpop then
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begin
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def) then
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location.registerhigh := n.location.registerhigh;
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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if not cmpop then
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begin
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def) then
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location.registerhigh := n.location.registerhigh;
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end;
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end;
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LOC_CONSTANT:
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begin
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if load_constants then
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begin
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location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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if not cmpop then
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def) then
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location.registerhigh := n.location.registerhigh;
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end;
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end;
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end;
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end;
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begin
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load_node(left);
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load_node(right);
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end;
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procedure tppcaddnode.clear_left_right(cmpop: boolean);
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begin
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if (right.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
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(cmpop or
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(location.register <> right.location.register)) then
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begin
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rg.ungetregister(exprasmlist,right.location.register);
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if is_64bitint(right.resulttype.def) then
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rg.ungetregister(exprasmlist,right.location.registerhigh);
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end;
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if (left.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
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(cmpop or
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(location.register <> left.location.register)) then
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begin
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rg.ungetregister(exprasmlist,left.location.register);
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if is_64bitint(left.resulttype.def) then
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rg.ungetregister(exprasmlist,left.location.registerhigh);
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end;
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end;
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function tppcaddnode.getresflags : tresflags;
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begin
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if (left.resulttype.def.deftype <> floatdef) then
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result.cr := R_CR0
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else
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result.cr := R_CR1;
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case nodetype of
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equaln : result.flag:=F_EQ;
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unequaln : result.flag:=F_NE;
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else
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if nf_swaped in flags then
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case nodetype of
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ltn : result.flag:=F_GT;
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lten : result.flag:=F_GE;
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gtn : result.flag:=F_LT;
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gten : result.flag:=F_LE;
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end
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else
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case nodetype of
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ltn : result.flag:=F_LT;
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lten : result.flag:=F_LE;
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gtn : result.flag:=F_GT;
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gten : result.flag:=F_GE;
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end;
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end
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end;
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procedure tppcaddnode.emit_compare(unsigned: boolean);
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var
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op : tasmop;
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tmpreg : tregister;
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useconst : boolean;
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begin
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// get the constant on the right if there is one
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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// can we use an immediate, or do we have to load the
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// constant in a register first?
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if (right.location.loc = LOC_CONSTANT) then
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begin
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{$ifdef extdebug}
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if (right.location.size in [OS_64,OS_S64]) and (hi(right.location.valueqword)<>0) and ((hi(right.location.valueqword)<>-1) or unsigned) then
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internalerror(2002080301);
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{$endif extdebug}
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if (nodetype in [equaln,unequaln]) then
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if (unsigned and
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(right.location.value > high(word))) or
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(not unsigned and
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(longint(right.location.value) < low(smallint)) or
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(longint(right.location.value) > high(smallint))) then
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// we can then maybe use a constant in the 'othersigned' case
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// (the sign doesn't matter for // equal/unequal)
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unsigned := not unsigned;
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if (unsigned and
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((right.location.value) <= high(word))) or
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(not(unsigned) and
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(longint(right.location.value) >= low(smallint)) and
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(longint(right.location.value) <= high(smallint))) then
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useconst := true
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else
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begin
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useconst := false;
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tmpreg := cg.get_scratch_reg_int(exprasmlist);
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cg.a_load_const_reg(exprasmlist,OS_INT,
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aword(right.location.value),tmpreg);
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end
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end
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else
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useconst := false;
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location.loc := LOC_FLAGS;
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location.resflags := getresflags;
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if not unsigned then
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if useconst then
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op := A_CMPWI
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else
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op := A_CMPW
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else
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if useconst then
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op := A_CMPLWI
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else
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op := A_CMPLW;
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if (right.location.loc = LOC_CONSTANT) then
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if useconst then
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exprasmlist.concat(taicpu.op_reg_const(op,
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left.location.register,longint(right.location.value)))
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else
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begin
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exprasmlist.concat(taicpu.op_reg_reg(op,
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left.location.register,tmpreg));
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cg.free_scratch_reg(exprasmlist,tmpreg);
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end
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else
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exprasmlist.concat(taicpu.op_reg_reg(op,
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left.location.register,right.location.register));
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end;
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{*****************************************************************************
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AddBoolean
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*****************************************************************************}
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procedure tppcaddnode.second_addboolean;
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var
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cgop : TOpCg;
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cgsize : TCgSize;
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cmpop,
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isjump : boolean;
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otl,ofl : tasmlabel;
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pushedregs : tmaybesave;
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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cmpop:=false;
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if (torddef(left.resulttype.def).typ=bool8bit) or
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(torddef(right.resulttype.def).typ=bool8bit) then
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cgsize:=OS_8
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else
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if (torddef(left.resulttype.def).typ=bool16bit) or
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(torddef(right.resulttype.def).typ=bool16bit) then
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cgsize:=OS_16
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else
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cgsize:=OS_32;
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if (cs_full_boolean_eval in aktlocalswitches) or
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(nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
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begin
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if left.nodetype in [ordconstn,realconstn] then
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swapleftright;
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isjump:=(left.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,left.location,cgsize,false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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isjump:=(right.location.loc=LOC_JUMP);
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if isjump then
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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end;
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secondpass(right);
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maybe_restore(exprasmlist,left.location,pushedregs);
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if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(exprasmlist,right.location,cgsize,false);
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if isjump then
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begin
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truelabel:=otl;
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falselabel:=ofl;
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end;
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cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
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{ set result location }
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if not cmpop then
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
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else
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location_reset(location,LOC_FLAGS,OS_NO);
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load_left_right(cmpop,false);
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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{ compare the }
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case nodetype of
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ltn,lten,gtn,gten,
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equaln,unequaln :
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begin
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if (right.location.loc <> LOC_CONSTANT) then
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exprasmlist.concat(taicpu.op_reg_reg(A_CMPLW,
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left.location.register,right.location.register))
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else
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exprasmlist.concat(taicpu.op_reg_const(A_CMPLWI,
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left.location.register,longint(right.location.value)));
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location.resflags := getresflags;
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end;
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else
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begin
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case nodetype of
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xorn :
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cgop:=OP_XOR;
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orn :
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cgop:=OP_OR;
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andn :
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cgop:=OP_AND;
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else
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internalerror(200203247);
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end;
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if right.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
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left.location.register,right.location.register,
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location.register)
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else
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cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
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aword(right.location.value),left.location.register,
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location.register);
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end;
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end;
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end
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else
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begin
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// just to make sure we free the right registers
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cmpop := true;
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case nodetype of
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andn,
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orn :
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begin
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location_reset(location,LOC_JUMP,OS_NO);
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case nodetype of
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andn :
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begin
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otl:=truelabel;
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objectlibrary.getlabel(truelabel);
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secondpass(left);
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maketojumpbool(exprasmlist,left,lr_load_regvars);
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cg.a_label(exprasmlist,truelabel);
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truelabel:=otl;
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end;
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orn :
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begin
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ofl:=falselabel;
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objectlibrary.getlabel(falselabel);
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secondpass(left);
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maketojumpbool(exprasmlist,left,lr_load_regvars);
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cg.a_label(exprasmlist,falselabel);
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falselabel:=ofl;
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end;
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else
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CGMessage(type_e_mismatch);
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end;
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secondpass(right);
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maketojumpbool(exprasmlist,right,lr_load_regvars);
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end;
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end;
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end;
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clear_left_right(cmpop);
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end;
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{*****************************************************************************
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AddFloat
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*****************************************************************************}
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procedure tppcaddnode.second_addfloat;
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var
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reg : tregister;
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op : TAsmOp;
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cmpop : boolean;
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procedure location_force_fpureg(var l: tlocation);
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begin
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if not(l.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) then
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begin
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reg := rg.getregisterfpu(exprasmlist);
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cg.a_loadfpu_loc_reg(exprasmlist,l,reg);
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location_freetemp(exprasmlist,l);
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location_release(exprasmlist,l);
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location_reset(l,LOC_FPUREGISTER,l.size);
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l.register := reg;
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end;
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end;
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begin
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pass_left_and_right;
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cmpop:=false;
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case nodetype of
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addn :
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op:=A_FADD;
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muln :
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op:=A_FMUL;
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subn :
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op:=A_FSUB;
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slashn :
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op:=A_FDIV;
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ltn,lten,gtn,gten,
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equaln,unequaln :
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begin
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op:=A_FCMPO;
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cmpop:=true;
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end;
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else
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CGMessage(type_e_mismatch);
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end;
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|
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// get the operands in the correct order, there are no special cases
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// here, everything is register-based
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if nf_swaped in flags then
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swapleftright;
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// put both operands in a register
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location_force_fpureg(right.location);
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location_force_fpureg(left.location);
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|
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// initialize de result
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if not cmpop then
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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if left.location.loc = LOC_FPUREGISTER then
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location.register := left.location.register
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else if right.location.loc = LOC_FPUREGISTER then
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location.register := right.location.register
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else
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location.register := rg.getregisterfpu(exprasmlist);
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end
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else
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begin
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags := getresflags;
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end;
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|
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// emit the actual operation
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if not cmpop then
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begin
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exprasmlist.concat(taicpu.op_reg_reg_reg(op,
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location.register,left.location.register,
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right.location.register))
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end
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else
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begin
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exprasmlist.concat(taicpu.op_reg_reg_reg(op,
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location.resflags.cr,left.location.register,right.location.register))
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end;
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clear_left_right(cmpop);
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end;
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|
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{*****************************************************************************
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|
AddSmallSet
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*****************************************************************************}
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|
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procedure tppcaddnode.second_addsmallset;
|
|
var
|
|
cgop : TOpCg;
|
|
tmpreg : tregister;
|
|
opdone,
|
|
cmpop : boolean;
|
|
begin
|
|
pass_left_and_right;
|
|
|
|
{ when a setdef is passed, it has to be a smallset }
|
|
if ((left.resulttype.def.deftype=setdef) and
|
|
(tsetdef(left.resulttype.def).settype<>smallset)) or
|
|
((right.resulttype.def.deftype=setdef) and
|
|
(tsetdef(right.resulttype.def).settype<>smallset)) then
|
|
internalerror(200203301);
|
|
|
|
opdone := false;
|
|
cmpop:=nodetype in [equaln,unequaln,lten,gten];
|
|
|
|
{ set result location }
|
|
if not cmpop then
|
|
location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
|
|
else
|
|
location_reset(location,LOC_FLAGS,OS_NO);
|
|
|
|
load_left_right(cmpop,false);
|
|
|
|
if not(cmpop) and
|
|
(location.register = R_NO) then
|
|
location.register := rg.getregisterint(exprasmlist);
|
|
|
|
case nodetype of
|
|
addn :
|
|
begin
|
|
if (nf_swaped in flags) and (left.nodetype=setelementn) then
|
|
swapleftright;
|
|
{ are we adding set elements ? }
|
|
if right.nodetype=setelementn then
|
|
begin
|
|
{ no range support for smallsets! }
|
|
if assigned(tsetelementnode(right).right) then
|
|
internalerror(43244);
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
|
|
aword(1 shl aword(right.location.value)),
|
|
left.location.register,location.register)
|
|
else
|
|
begin
|
|
tmpreg := cg.get_scratch_reg_int(exprasmlist);
|
|
cg.a_load_const_reg(exprasmlist,OS_INT,1,tmpreg);
|
|
cg.a_op_reg_reg(exprasmlist,OP_SHL,OS_INT,
|
|
right.location.register,tmpreg);
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_INT,tmpreg,
|
|
left.location.register,location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
|
|
aword(left.location.value),tmpreg,location.register);
|
|
cg.free_scratch_reg(exprasmlist,tmpreg);
|
|
end;
|
|
opdone := true;
|
|
end
|
|
else
|
|
cgop := OP_OR;
|
|
end;
|
|
symdifn :
|
|
cgop:=OP_XOR;
|
|
muln :
|
|
cgop:=OP_AND;
|
|
subn :
|
|
begin
|
|
cgop:=OP_AND;
|
|
if (not(nf_swaped in flags)) then
|
|
if (right.location.loc=LOC_CONSTANT) then
|
|
right.location.value := not(right.location.value)
|
|
else
|
|
opdone := true
|
|
else if (left.location.loc=LOC_CONSTANT) then
|
|
left.location.value := not(left.location.value)
|
|
else
|
|
begin
|
|
swapleftright;
|
|
opdone := true;
|
|
end;
|
|
if opdone then
|
|
begin
|
|
if left.location.loc = LOC_CONSTANT then
|
|
begin
|
|
tmpreg := cg.get_scratch_reg_int(exprasmlist);
|
|
cg.a_load_const_reg(exprasmlist,OS_INT,
|
|
aword(left.location.value),tmpreg);
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC,
|
|
location.register,tmpreg,right.location.register));
|
|
cg.free_scratch_reg(exprasmlist,tmpreg);
|
|
end
|
|
else
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC,
|
|
location.register,left.location.register,
|
|
right.location.register));
|
|
end;
|
|
end;
|
|
equaln,
|
|
unequaln :
|
|
begin
|
|
emit_compare(true);
|
|
opdone := true;
|
|
end;
|
|
lten,gten:
|
|
begin
|
|
If (not(nf_swaped in flags) and
|
|
(nodetype = lten)) or
|
|
((nf_swaped in flags) and
|
|
(nodetype = gten)) then
|
|
swapleftright;
|
|
// now we have to check whether left >= right
|
|
tmpreg := cg.get_scratch_reg_int(exprasmlist);
|
|
if left.location.loc = LOC_CONSTANT then
|
|
begin
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_AND,OS_INT,
|
|
not(left.location.value),right.location.register,tmpreg);
|
|
exprasmlist.concat(taicpu.op_reg_const(A_CMPWI,tmpreg,0));
|
|
// the two instructions above should be folded together by
|
|
// the peepholeoptimizer
|
|
end
|
|
else
|
|
begin
|
|
if right.location.loc = LOC_CONSTANT then
|
|
begin
|
|
cg.a_load_const_reg(exprasmlist,OS_INT,
|
|
aword(right.location.value),tmpreg);
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
|
|
tmpreg,left.location.register));
|
|
end
|
|
else
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
|
|
right.location.register,left.location.register));
|
|
end;
|
|
cg.free_scratch_reg(exprasmlist,tmpreg);
|
|
location.resflags.cr := R_CR0;
|
|
location.resflags.flag := F_EQ;
|
|
opdone := true;
|
|
end;
|
|
else
|
|
internalerror(2002072701);
|
|
end;
|
|
|
|
if not opdone then
|
|
begin
|
|
// these are all commutative operations
|
|
if (left.location.loc = LOC_CONSTANT) then
|
|
swapleftright;
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
|
|
aword(right.location.value),left.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
|
|
right.location.register,left.location.register,
|
|
location.register);
|
|
end;
|
|
|
|
clear_left_right(cmpop);
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
Add64bit
|
|
*****************************************************************************}
|
|
|
|
procedure tppcaddnode.second_add64bit;
|
|
var
|
|
op : TOpCG;
|
|
op1,op2 : TAsmOp;
|
|
hl4 : tasmlabel;
|
|
cmpop,
|
|
unsigned : boolean;
|
|
|
|
|
|
procedure emit_cmp64_hi;
|
|
|
|
var
|
|
oldleft, oldright: tlocation;
|
|
begin
|
|
// put the high part of the location in the low part
|
|
location_copy(oldleft,left.location);
|
|
location_copy(oldright,right.location);
|
|
if left.location.loc = LOC_CONSTANT then
|
|
left.location.valueqword := left.location.valueqword shr 32
|
|
else
|
|
left.location.registerlow := left.location.registerhigh;
|
|
if right.location.loc = LOC_CONSTANT then
|
|
right.location.valueqword := right.location.valueqword shr 32
|
|
else
|
|
right.location.registerlow := right.location.registerhigh;
|
|
|
|
// and call the normal emit_compare
|
|
emit_compare(unsigned);
|
|
location_copy(left.location,oldleft);
|
|
location_copy(right.location,oldright);
|
|
end;
|
|
|
|
|
|
procedure emit_cmp64_lo;
|
|
|
|
begin
|
|
emit_compare(true);
|
|
end;
|
|
|
|
|
|
procedure firstjmp64bitcmp;
|
|
|
|
var
|
|
oldnodetype: tnodetype;
|
|
begin
|
|
load_all_regvars(exprasmlist);
|
|
{ the jump the sequence is a little bit hairy }
|
|
case nodetype of
|
|
ltn,gtn:
|
|
begin
|
|
cg.a_jmp_flags(exprasmlist,getresflags,truelabel);
|
|
{ cheat a little bit for the negative test }
|
|
toggleflag(nf_swaped);
|
|
cg.a_jmp_flags(exprasmlist,getresflags,falselabel);
|
|
toggleflag(nf_swaped);
|
|
end;
|
|
lten,gten:
|
|
begin
|
|
oldnodetype:=nodetype;
|
|
if nodetype=lten then
|
|
nodetype:=ltn
|
|
else
|
|
nodetype:=gtn;
|
|
cg.a_jmp_flags(exprasmlist,getresflags,truelabel);
|
|
{ cheat for the negative test }
|
|
if nodetype=ltn then
|
|
nodetype:=gtn
|
|
else
|
|
nodetype:=ltn;
|
|
cg.a_jmp_flags(exprasmlist,getresflags,falselabel);
|
|
nodetype:=oldnodetype;
|
|
end;
|
|
equaln:
|
|
begin
|
|
nodetype := unequaln;
|
|
cg.a_jmp_flags(exprasmlist,getresflags,falselabel);
|
|
nodetype := equaln;
|
|
end;
|
|
unequaln:
|
|
begin
|
|
cg.a_jmp_flags(exprasmlist,getresflags,truelabel);
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure secondjmp64bitcmp;
|
|
|
|
begin
|
|
{ the jump the sequence is a little bit hairy }
|
|
case nodetype of
|
|
ltn,gtn,lten,gten:
|
|
begin
|
|
{ the comparisaion of the low dword have to be }
|
|
{ always unsigned! }
|
|
cg.a_jmp_flags(exprasmlist,getresflags,truelabel);
|
|
cg.a_jmp_always(exprasmlist,falselabel);
|
|
end;
|
|
equaln:
|
|
begin
|
|
nodetype := unequaln;
|
|
cg.a_jmp_flags(exprasmlist,getresflags,falselabel);
|
|
cg.a_jmp_always(exprasmlist,truelabel);
|
|
nodetype := equaln;
|
|
end;
|
|
unequaln:
|
|
begin
|
|
cg.a_jmp_flags(exprasmlist,getresflags,truelabel);
|
|
cg.a_jmp_always(exprasmlist,falselabel);
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
var
|
|
tempreg64: tregister64;
|
|
|
|
begin
|
|
firstcomplex(self);
|
|
|
|
pass_left_and_right;
|
|
|
|
cmpop:=false;
|
|
unsigned:=((left.resulttype.def.deftype=orddef) and
|
|
(torddef(left.resulttype.def).typ=u64bit)) or
|
|
((right.resulttype.def.deftype=orddef) and
|
|
(torddef(right.resulttype.def).typ=u64bit));
|
|
case nodetype of
|
|
addn :
|
|
begin
|
|
op:=OP_ADD;
|
|
end;
|
|
subn :
|
|
begin
|
|
op:=OP_SUB;
|
|
end;
|
|
ltn,lten,
|
|
gtn,gten,
|
|
equaln,unequaln:
|
|
begin
|
|
op:=OP_NONE;
|
|
cmpop:=true;
|
|
end;
|
|
xorn:
|
|
op:=OP_XOR;
|
|
orn:
|
|
op:=OP_OR;
|
|
andn:
|
|
op:=OP_AND;
|
|
muln:
|
|
begin
|
|
{ should be handled in pass_1 (JM) }
|
|
internalerror(200109051);
|
|
end;
|
|
else
|
|
internalerror(2002072705);
|
|
end;
|
|
|
|
if not cmpop then
|
|
location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
|
|
|
|
load_left_right(cmpop,(cs_check_overflow in aktlocalswitches) and
|
|
(nodetype in [addn,subn]));
|
|
|
|
if not(cs_check_overflow in aktlocalswitches) or
|
|
not(nodetype in [addn,subn]) then
|
|
begin
|
|
case nodetype of
|
|
ltn,lten,
|
|
gtn,gten:
|
|
begin
|
|
emit_cmp64_hi;
|
|
firstjmp64bitcmp;
|
|
emit_cmp64_lo;
|
|
secondjmp64bitcmp;
|
|
end;
|
|
equaln,unequaln:
|
|
begin
|
|
// instead of doing a complicated compare, do
|
|
// (left.hi xor right.hi) or (left.lo xor right.lo)
|
|
// (somewhate optimized so that no superfluous 'mr's are
|
|
// generated)
|
|
if (left.location.loc = LOC_CONSTANT) then
|
|
swapleftright;
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
begin
|
|
if left.location.loc = LOC_REGISTER then
|
|
begin
|
|
tempreg64.reglo := left.location.registerlow;
|
|
tempreg64.reghi := left.location.registerhigh;
|
|
end
|
|
else
|
|
begin
|
|
if (aword(right.location.valueqword) <> 0) then
|
|
tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist)
|
|
else
|
|
tempreg64.reglo := left.location.registerlow;
|
|
if ((right.location.valueqword shr 16) <> 0) then
|
|
tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist)
|
|
else
|
|
tempreg64.reghi := left.location.registerhigh;
|
|
end;
|
|
|
|
if (aword(right.location.valueqword) <> 0) then
|
|
begin
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_XOR,OS_INT,
|
|
aword(right.location.valueqword),
|
|
left.location.registerlow,tempreg64.reglo);
|
|
end;
|
|
if ((right.location.valueqword shr 16) <> 0) then
|
|
begin
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_XOR,OS_INT,
|
|
(right.location.valueqword shr 16),
|
|
left.location.registerhigh,tempreg64.reghi);
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist);
|
|
tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist);
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,OP_XOR,
|
|
left.location.register64,right.location.register64,
|
|
tempreg64);
|
|
end;
|
|
|
|
cg.a_reg_alloc(exprasmlist,R_0);
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR_,R_0,
|
|
tempreg64.reglo,tempreg64.reghi));
|
|
cg.a_reg_dealloc(exprasmlist,R_0);
|
|
if (tempreg64.reglo <> left.location.registerlow) then
|
|
cg.free_scratch_reg(exprasmlist,tempreg64.reglo);
|
|
if (tempreg64.reghi <> left.location.registerhigh) then
|
|
cg.free_scratch_reg(exprasmlist,tempreg64.reghi);
|
|
|
|
location_reset(location,LOC_FLAGS,OS_NO);
|
|
location.resflags := getresflags;
|
|
end;
|
|
xorn,orn,andn,addn:
|
|
begin
|
|
if (location.registerlow = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist);
|
|
location.registerhigh := rg.getregisterint(exprasmlist);
|
|
end;
|
|
|
|
if (left.location.loc = LOC_CONSTANT) then
|
|
swapleftright;
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg64.a_op64_const_reg_reg(exprasmlist,op,right.location.valueqword,
|
|
left.location.register64,location.register64)
|
|
else
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,op,right.location.register64,
|
|
left.location.register64,location.register64);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swaped in flags) then
|
|
swapleftright;
|
|
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if (location.registerlow = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist);
|
|
location.registerhigh := rg.getregisterint(exprasmlist);
|
|
end;
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
// reg64 - reg64
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.register64,left.location.register64,
|
|
location.register64)
|
|
else
|
|
// reg64 - const64
|
|
cg64.a_op64_const_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.valueqword,left.location.register64,
|
|
location.register64)
|
|
end
|
|
else if ((left.location.valueqword shr 32) = 0) then
|
|
begin
|
|
if (location.registerlow = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist);
|
|
location.registerhigh := rg.getregisterint(exprasmlist);
|
|
end;
|
|
if (int64(left.location.valueqword) >= low(smallint)) and
|
|
(int64(left.location.valueqword) <= high(smallint)) then
|
|
begin
|
|
// consts16 - reg64
|
|
exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,
|
|
location.registerlow,right.location.registerlow,
|
|
aword(left.location.value)));
|
|
end
|
|
else
|
|
begin
|
|
// const32 - reg64
|
|
cg.a_load_const_reg(exprasmlist,OS_32,
|
|
aword(left.location.valueqword),location.registerlow);
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBC,
|
|
location.registerlow,location.registerlow,
|
|
right.location.registerlow));
|
|
end;
|
|
exprasmlist.concat(taicpu.op_reg_reg(A_SUBFZE,
|
|
location.registerhigh,right.location.registerhigh));
|
|
end
|
|
else if (aword(left.location.valueqword) = 0) then
|
|
begin
|
|
// (const32 shl 32) - reg64
|
|
if (location.registerlow = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist);
|
|
location.registerhigh := rg.getregisterint(exprasmlist);
|
|
end;
|
|
exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,
|
|
location.registerlow,right.location.registerlow,0));
|
|
cg.a_load_const_reg(exprasmlist,OS_INT,
|
|
left.location.valueqword shr 32,location.registerhigh);
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBFE,
|
|
location.registerhigh,right.location.registerhigh,
|
|
location.registerhigh));
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
location_force_reg(exprasmlist,left.location,
|
|
def_cgsize(left.resulttype.def),true);
|
|
if (left.location.loc = LOC_REGISTER) then
|
|
location.register64 := left.location.register64
|
|
else if (location.registerlow = R_NO) then
|
|
begin
|
|
location.registerlow := rg.getregisterint(exprasmlist);
|
|
location.registerhigh := rg.getregisterint(exprasmlist);
|
|
end;
|
|
cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
right.location.register64,left.location.register64,
|
|
location.register64);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072803);
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
case nodetype of
|
|
addn:
|
|
begin
|
|
op1 := A_ADDC;
|
|
op2 := A_ADDZEO_;
|
|
end;
|
|
subn:
|
|
begin
|
|
op1 := A_SUBC;
|
|
op2 := A_SUBFEO_;
|
|
end;
|
|
else
|
|
internalerror(2002072806);
|
|
end;
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(op1,location.registerlow,
|
|
left.location.registerlow,right.location.registerlow));
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(op2,location.registerhigh,
|
|
right.location.registerhigh,left.location.registerhigh));
|
|
cg.g_overflowcheck(exprasmlist,self);
|
|
end;
|
|
|
|
{ set result location }
|
|
{ (emit_compare sets it to LOC_FLAGS for compares, so set the }
|
|
{ real location only now) (JM) }
|
|
if cmpop and
|
|
not(nodetype in [equaln,unequaln]) then
|
|
location_reset(location,LOC_JUMP,OS_NO);
|
|
|
|
clear_left_right(cmpop);
|
|
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
AddMMX
|
|
*****************************************************************************}
|
|
|
|
{$ifdef SUPPORT_MMX}
|
|
procedure ti386addnode.second_addmmx;
|
|
var
|
|
op : TAsmOp;
|
|
cmpop : boolean;
|
|
mmxbase : tmmxtype;
|
|
hregister : tregister;
|
|
begin
|
|
pass_left_and_right;
|
|
|
|
cmpop:=false;
|
|
mmxbase:=mmx_type(left.resulttype.def);
|
|
case nodetype of
|
|
addn :
|
|
begin
|
|
if (cs_mmx_saturation in aktlocalswitches) then
|
|
begin
|
|
case mmxbase of
|
|
mmxs8bit:
|
|
op:=A_PADDSB;
|
|
mmxu8bit:
|
|
op:=A_PADDUSB;
|
|
mmxs16bit,mmxfixed16:
|
|
op:=A_PADDSB;
|
|
mmxu16bit:
|
|
op:=A_PADDUSW;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
case mmxbase of
|
|
mmxs8bit,mmxu8bit:
|
|
op:=A_PADDB;
|
|
mmxs16bit,mmxu16bit,mmxfixed16:
|
|
op:=A_PADDW;
|
|
mmxs32bit,mmxu32bit:
|
|
op:=A_PADDD;
|
|
end;
|
|
end;
|
|
end;
|
|
muln :
|
|
begin
|
|
case mmxbase of
|
|
mmxs16bit,mmxu16bit:
|
|
op:=A_PMULLW;
|
|
mmxfixed16:
|
|
op:=A_PMULHW;
|
|
end;
|
|
end;
|
|
subn :
|
|
begin
|
|
if (cs_mmx_saturation in aktlocalswitches) then
|
|
begin
|
|
case mmxbase of
|
|
mmxs8bit:
|
|
op:=A_PSUBSB;
|
|
mmxu8bit:
|
|
op:=A_PSUBUSB;
|
|
mmxs16bit,mmxfixed16:
|
|
op:=A_PSUBSB;
|
|
mmxu16bit:
|
|
op:=A_PSUBUSW;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
case mmxbase of
|
|
mmxs8bit,mmxu8bit:
|
|
op:=A_PSUBB;
|
|
mmxs16bit,mmxu16bit,mmxfixed16:
|
|
op:=A_PSUBW;
|
|
mmxs32bit,mmxu32bit:
|
|
op:=A_PSUBD;
|
|
end;
|
|
end;
|
|
end;
|
|
xorn:
|
|
op:=A_PXOR;
|
|
orn:
|
|
op:=A_POR;
|
|
andn:
|
|
op:=A_PAND;
|
|
else
|
|
CGMessage(type_e_mismatch);
|
|
end;
|
|
|
|
{ left and right no register? }
|
|
{ then one must be demanded }
|
|
if (left.location.loc<>LOC_MMXREGISTER) then
|
|
begin
|
|
if (right.location.loc=LOC_MMXREGISTER) then
|
|
begin
|
|
location_swap(left.location,right.location);
|
|
toggleflag(nf_swaped);
|
|
end
|
|
else
|
|
begin
|
|
{ register variable ? }
|
|
if (left.location.loc=LOC_CMMXREGISTER) then
|
|
begin
|
|
hregister:=rg.getregistermm(exprasmlist);
|
|
emit_reg_reg(A_MOVQ,S_NO,left.location.register,hregister);
|
|
end
|
|
else
|
|
begin
|
|
if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
|
|
internalerror(200203245);
|
|
|
|
location_release(exprasmlist,left.location);
|
|
|
|
hregister:=rg.getregistermm(exprasmlist);
|
|
emit_ref_reg(A_MOVQ,S_NO,left.location.reference,hregister);
|
|
end;
|
|
|
|
location_reset(left.location,LOC_MMXREGISTER,OS_NO);
|
|
left.location.register:=hregister;
|
|
end;
|
|
end;
|
|
|
|
{ at this point, left.location.loc should be LOC_MMXREGISTER }
|
|
if right.location.loc<>LOC_MMXREGISTER then
|
|
begin
|
|
if (nodetype=subn) and (nf_swaped in flags) then
|
|
begin
|
|
if right.location.loc=LOC_CMMXREGISTER then
|
|
begin
|
|
emit_reg_reg(A_MOVQ,S_NO,right.location.register,R_MM7);
|
|
emit_reg_reg(op,S_NO,left.location.register,R_MM7);
|
|
emit_reg_reg(A_MOVQ,S_NO,R_MM7,left.location.register);
|
|
end
|
|
else
|
|
begin
|
|
if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
|
|
internalerror(200203247);
|
|
emit_ref_reg(A_MOVQ,S_NO,right.location.reference,R_MM7);
|
|
emit_reg_reg(op,S_NO,left.location.register,R_MM7);
|
|
emit_reg_reg(A_MOVQ,S_NO,R_MM7,left.location.register);
|
|
location_release(exprasmlist,right.location);
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
if (right.location.loc=LOC_CMMXREGISTER) then
|
|
begin
|
|
emit_reg_reg(op,S_NO,right.location.register,left.location.register);
|
|
end
|
|
else
|
|
begin
|
|
if not(right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
|
|
internalerror(200203246);
|
|
emit_ref_reg(op,S_NO,right.location.reference,left.location.register);
|
|
location_release(exprasmlist,right.location);
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
{ right.location=LOC_MMXREGISTER }
|
|
if (nodetype=subn) and (nf_swaped in flags) then
|
|
begin
|
|
emit_reg_reg(op,S_NO,left.location.register,right.location.register);
|
|
location_swap(left.location,right.location);
|
|
toggleflag(nf_swaped);
|
|
end
|
|
else
|
|
begin
|
|
emit_reg_reg(op,S_NO,right.location.register,left.location.register);
|
|
end;
|
|
end;
|
|
|
|
location_freetemp(exprasmlist,right.location);
|
|
location_release(exprasmlist,right.location);
|
|
if cmpop then
|
|
begin
|
|
location_freetemp(exprasmlist,left.location);
|
|
location_release(exprasmlist,left.location);
|
|
end;
|
|
set_result_location(cmpop,true);
|
|
end;
|
|
{$endif SUPPORT_MMX}
|
|
|
|
|
|
{*****************************************************************************
|
|
pass_2
|
|
*****************************************************************************}
|
|
|
|
procedure tppcaddnode.pass_2;
|
|
{ is also being used for xor, and "mul", "sub, or and comparative }
|
|
{ operators }
|
|
var
|
|
cmpop : boolean;
|
|
cgop : topcg;
|
|
op : tasmop;
|
|
tmpreg : tregister;
|
|
|
|
{ true, if unsigned types are compared }
|
|
unsigned : boolean;
|
|
|
|
regstopush: tregisterset;
|
|
|
|
begin
|
|
{ to make it more readable, string and set (not smallset!) have their
|
|
own procedures }
|
|
case left.resulttype.def.deftype of
|
|
orddef :
|
|
begin
|
|
{ handling boolean expressions }
|
|
if is_boolean(left.resulttype.def) and
|
|
is_boolean(right.resulttype.def) then
|
|
begin
|
|
second_addboolean;
|
|
exit;
|
|
end
|
|
{ 64bit operations }
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
second_add64bit;
|
|
exit;
|
|
end;
|
|
end;
|
|
stringdef :
|
|
begin
|
|
internalerror(2002072402);
|
|
exit;
|
|
end;
|
|
setdef :
|
|
begin
|
|
{ normalsets are already handled in pass1 }
|
|
if (tsetdef(left.resulttype.def).settype<>smallset) then
|
|
internalerror(200109041);
|
|
second_addsmallset;
|
|
exit;
|
|
end;
|
|
arraydef :
|
|
begin
|
|
{$ifdef SUPPORT_MMX}
|
|
if is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
second_addmmx;
|
|
exit;
|
|
end;
|
|
{$endif SUPPORT_MMX}
|
|
end;
|
|
floatdef :
|
|
begin
|
|
second_addfloat;
|
|
exit;
|
|
end;
|
|
end;
|
|
|
|
{ defaults }
|
|
cmpop:=nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
|
|
unsigned:=not(is_signed(left.resulttype.def)) or
|
|
not(is_signed(right.resulttype.def));
|
|
|
|
pass_left_and_right;
|
|
|
|
{ Convert flags to register first }
|
|
{ can any of these things be in the flags actually?? (JM) }
|
|
|
|
if (left.location.loc = LOC_FLAGS) or
|
|
(right.location.loc = LOC_FLAGS) then
|
|
internalerror(2002072602);
|
|
|
|
{ set result location }
|
|
if not cmpop then
|
|
location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
|
|
else
|
|
location_reset(location,LOC_FLAGS,OS_NO);
|
|
|
|
load_left_right(cmpop, (cs_check_overflow in aktlocalswitches) and
|
|
(nodetype in [addn,subn,muln]));
|
|
|
|
if (location.register = R_NO) and
|
|
not(cmpop) then
|
|
location.register := rg.getregisterint(exprasmlist);
|
|
|
|
if not(cs_check_overflow in aktlocalswitches) or
|
|
(cmpop) or
|
|
(nodetype in [orn,andn,xorn]) then
|
|
begin
|
|
case nodetype of
|
|
addn, muln, xorn, orn, andn:
|
|
begin
|
|
case nodetype of
|
|
addn:
|
|
cgop := OP_ADD;
|
|
muln:
|
|
if unsigned then
|
|
cgop := OP_MUL
|
|
else
|
|
cgop := OP_IMUL;
|
|
xorn:
|
|
cgop := OP_XOR;
|
|
orn:
|
|
cgop := OP_OR;
|
|
andn:
|
|
cgop := OP_AND;
|
|
end;
|
|
if (left.location.loc = LOC_CONSTANT) then
|
|
swapleftright;
|
|
if (right.location.loc <> LOC_CONSTANT) then
|
|
cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
|
|
left.location.register,right.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
|
|
aword(right.location.value),left.location.register,
|
|
location.register);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swaped in flags) then
|
|
swapleftright;
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
right.location.register,left.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
aword(right.location.value),left.location.register,
|
|
location.register)
|
|
else
|
|
if (longint(left.location.value) >= low(smallint)) and
|
|
(longint(left.location.value) <= high(smallint)) then
|
|
begin
|
|
exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,
|
|
location.register,right.location.register,
|
|
left.location.value));
|
|
end
|
|
else
|
|
begin
|
|
tmpreg := cg.get_scratch_reg_int(exprasmlist);
|
|
cg.a_load_const_reg(exprasmlist,OS_INT,
|
|
aword(left.location.value),tmpreg);
|
|
cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
right.location.register,tmpreg,location.register);
|
|
cg.free_scratch_reg(exprasmlist,tmpreg);
|
|
end;
|
|
end;
|
|
ltn,lten,gtn,gten,equaln,unequaln :
|
|
begin
|
|
emit_compare(unsigned);
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
// overflow checking is on and we have an addn, subn or muln
|
|
begin
|
|
case nodetype of
|
|
addn:
|
|
op := A_ADDO_;
|
|
subn:
|
|
op := A_SUBO_;
|
|
muln:
|
|
op := A_MULLWO_;
|
|
else
|
|
internalerror(2002072601);
|
|
end;
|
|
exprasmlist.concat(taicpu.op_reg_reg_reg(op,location.register,
|
|
left.location.register,right.location.register));
|
|
cg.g_overflowcheck(exprasmlist,self);
|
|
end;
|
|
|
|
clear_left_right(cmpop);
|
|
end;
|
|
|
|
begin
|
|
caddnode:=tppcaddnode;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.16 2002-09-04 19:42:45 jonas
|
|
* fixed bugs in 64bit operations (registers weren't always allocated for
|
|
the result)
|
|
* optimized 'const64 - reg64/mem64'
|
|
* optimized equaln/unequaln with 64bit values (change them to
|
|
'(left.hi xor right.hi) or (left.lo xor right.lo)' so there are less
|
|
branches and the result can be returned in the flags this way. Could
|
|
be done for the i386 too probably.
|
|
|
|
Revision 1.15 2002/08/31 21:30:46 florian
|
|
* fixed several problems caused by Jonas' commit :)
|
|
|
|
Revision 1.14 2002/08/31 19:26:20 jonas
|
|
* fixed 64bit comparisons
|
|
|
|
Revision 1.13 2002/08/17 22:09:47 florian
|
|
* result type handling in tcgcal.pass_2 overhauled
|
|
* better tnode.dowrite
|
|
* some ppc stuff fixed
|
|
|
|
Revision 1.12 2002/08/14 18:41:48 jonas
|
|
- remove valuelow/valuehigh fields from tlocation, because they depend
|
|
on the endianess of the host operating system -> difficult to get
|
|
right. Use lo/hi(location.valueqword) instead (remember to use
|
|
valueqword and not value!!)
|
|
|
|
Revision 1.11 2002/08/11 14:32:32 peter
|
|
* renamed current_library to objectlibrary
|
|
|
|
Revision 1.10 2002/08/11 13:24:18 peter
|
|
* saving of asmsymbols in ppu supported
|
|
* asmsymbollist global is removed and moved into a new class
|
|
tasmlibrarydata that will hold the info of a .a file which
|
|
corresponds with a single module. Added librarydata to tmodule
|
|
to keep the library info stored for the module. In the future the
|
|
objectfiles will also be stored to the tasmlibrarydata class
|
|
* all getlabel/newasmsymbol and friends are moved to the new class
|
|
|
|
Revision 1.9 2002/08/11 11:40:16 jonas
|
|
* some overflow checking fixes
|
|
|
|
Revision 1.8 2002/08/11 06:14:40 florian
|
|
* fixed powerpc compilation problems
|
|
|
|
Revision 1.7 2002/08/10 17:15:31 jonas
|
|
* various fixes and optimizations
|
|
|
|
Revision 1.6 2002/08/06 20:55:24 florian
|
|
* first part of ppc calling conventions fix
|
|
|
|
Revision 1.5 2002/08/05 08:58:54 jonas
|
|
* fixed compilation problems
|
|
|
|
Revision 1.4 2002/08/04 12:57:56 jonas
|
|
* more misc. fixes, mostly constant-related
|
|
|
|
Revision 1.3 2002/07/28 16:02:49 jonas
|
|
+ 64 bit operations (badly tested), everything is implemented now!
|
|
* some small fixes
|
|
|
|
Revision 1.2 2002/07/27 20:00:59 jonas
|
|
+ second_addboolean(), second_addfloat() and second_addsmallset()
|
|
(64bit stuff is all that's left to do)
|
|
|
|
Revision 1.1 2002/07/26 12:31:57 jonas
|
|
+ intial implementation of add nodes, only integer/enumeration/pointer/...
|
|
handling is finished
|
|
}
|