mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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427 lines
12 KiB
PHP
427 lines
12 KiB
PHP
{
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This file is part of the Free Pascal run time library.
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Copyright (c) 1999-2000 by the Free Pascal development team
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This file contains some helper routines for int64 and qword
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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**********************************************************************}
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{$Q- no overflow checking }
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{$R- no range checking }
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function div_qword_throwdivbyzero(n,z : qword) : qword;
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begin
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HandleErrorFrame(200,get_frame);
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end;
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{$define FPC_SYSTEM_HAS_DIV_INT64}
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function fpc_div_int64(n,z : int64) : int64;assembler;nostackframe;[public,alias: 'FPC_DIV_INT64']; compilerproc;
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{ n = [esp + 12], z = [esp + 4]. }
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asm
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push %ebx
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push %esi
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push %edi
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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movl 12+16(%esp),%ecx { ecx = hi(n) }
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movl 12+12(%esp),%ebx { ebx = lo(n) }
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movl 12+8(%esp),%edx { edx = hi(z) }
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movl 12+4(%esp),%eax { eax = lo(z) }
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movl %ecx,%esi
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xorl %edx,%esi
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sarl $31,%esi
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movl %edx,%edi
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sarl $31,%edi
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xorl %edi,%eax
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xorl %edi,%edx
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subl %edi,%eax
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sbbl %edi,%edx
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movl %ecx,%edi
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sarl $31,%edi
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xorl %edi,%ebx
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xorl %edi,%ecx
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subl %edi,%ebx
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sbbl %edi,%ecx
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jnz .Lbigdivisor
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cmpl %ebx,%edx
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jae .Ltwo_divs
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divl %ebx
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.Lmake_sign_zero_hi:
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xorl %edx,%edx
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.Lmake_sign:
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xorl %esi,%eax
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xorl %esi,%edx
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subl %esi,%eax
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sbbl %esi,%edx
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pop %edi
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pop %esi
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pop %ebx
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ret $16
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.Ltwo_divs:
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test %ebx,%ebx { Zero division ends up here with ebx = 0. }
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jz .Ldivzero
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movl %eax,%ecx
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movl %edx,%eax
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xorl %edx,%edx
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divl %ebx
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xchgl %ecx,%eax
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divl %ebx
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movl %ecx,%edx
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jmp .Lmake_sign
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.Lbigdivisor:
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movl %eax,12+4(%esp) { Reuse n~z stack space. }
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movl %ebx,12+8(%esp)
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movl %edx,12+12(%esp)
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movl %ecx,%edi
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shrl $1,%edx
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rcrl $1,%eax
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rorl $1,%edi
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rcrl $1,%ebx
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bsrl %ecx,%ecx
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shrdl %cl,%edi,%ebx
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shrdl %cl,%edx,%eax
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shrl %cl,%edx
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roll $1,%edi
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divl %ebx
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movl 12+4(%esp),%ebx
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movl %eax,%ecx
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imull %eax,%edi
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mull 12+8(%esp)
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addl %edi,%edx
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subl %eax,%ebx
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movl %ecx,%eax
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movl 12+12(%esp),%ecx
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sbbl %edx,%ecx
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sbbl $0,%eax
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jmp .Lmake_sign_zero_hi
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.Ldivzero:
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pop %edi
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pop %esi
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pop %ebx
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jmp div_qword_throwdivbyzero
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end;
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{$define FPC_SYSTEM_HAS_MOD_INT64}
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function fpc_mod_int64(n,z : int64) : int64;assembler;nostackframe;[public,alias: 'FPC_MOD_INT64']; compilerproc;
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{ n = [esp + 12], z = [esp + 4]. }
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asm
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push %ebx
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push %esi
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push %edi
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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movl 12+16(%esp),%ecx
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movl 12+12(%esp),%ebx
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movl 12+8(%esp),%edx
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movl 12+4(%esp),%eax
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movl %edx,%esi
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sarl $31,%esi
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movl %edx,%edi
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sarl $31,%edi
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xorl %edi,%eax
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xorl %edi,%edx
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subl %edi,%eax
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sbbl %edi,%edx
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movl %ecx,%edi
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sarl $31,%edi
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xorl %edi,%ebx
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xorl %edi,%ecx
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subl %edi,%ebx
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sbbl %edi,%ecx
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jnz .Lbig_divisor
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cmpl %ebx,%edx
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jae .Ltwo_divs
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divl %ebx
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movl %edx,%eax
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movl %ecx,%edx
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.Lmake_sign:
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xorl %esi,%eax
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xorl %esi,%edx
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subl %esi,%eax
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sbbl %esi,%edx
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pop %edi
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pop %esi
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pop %ebx
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ret $16
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.Ltwo_divs:
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test %ebx,%ebx { Zero division ends up here with ebx = 0. }
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jz .Ldivzero
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movl %eax,%ecx
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movl %edx,%eax
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xorl %edx,%edx
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divl %ebx
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movl %ecx,%eax
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divl %ebx
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movl %edx,%eax
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xorl %edx,%edx
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jmp .Lmake_sign
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.Lbig_divisor:
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movl %eax,12+4(%esp) { Reuse n~z stack space. }
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movl %ebx,12+8(%esp)
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movl %edx,12+12(%esp)
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movl %ecx,12+16(%esp)
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movl %ecx,%edi
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shrl $1,%edx
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rcrl $1,%eax
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rorl $1,%edi
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rcrl $1,%ebx
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bsrl %ecx,%ecx
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shrdl %cl,%edi,%ebx
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shrdl %cl,%edx,%eax
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shrl %cl,%edx
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roll $1,%edi
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divl %ebx
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movl 12+4(%esp),%ebx
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movl %eax,%ecx
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imull %eax,%edi
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mull 12+8(%esp)
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addl %edi,%edx
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subl %eax,%ebx
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movl 12+12(%esp),%ecx
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sbbl %edx,%ecx
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sbbl %eax,%eax
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movl 12+16(%esp),%edx
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andl %eax,%edx
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andl 12+8(%esp),%eax
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addl %ebx,%eax
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adcl %ecx,%edx
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jmp .Lmake_sign
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.Ldivzero:
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pop %edi
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pop %esi
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pop %ebx
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jmp div_qword_throwdivbyzero
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end;
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{$define FPC_SYSTEM_HAS_DIV_QWORD}
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function fpc_div_qword(n,z : qword) : qword;assembler;nostackframe;[public,alias: 'FPC_DIV_QWORD']; compilerproc;
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{ n = [esp + 12], z = [esp + 4]. }
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asm
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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movl 16(%esp),%ecx { ecx = hi(n) }
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test %ecx,%ecx
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jnz .Lqworddivbigdivisor
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movl 12(%esp),%ecx { ecx = lo(n) }
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movl 8(%esp),%edx { edx = hi(z) }
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cmpl %ecx,%edx
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jae .Lqworddivtwo_divs
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movl 4(%esp),%eax { eax = lo(z) }
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divl %ecx
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xorl %edx,%edx
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ret $16
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.Lqworddivtwo_divs:
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test %ecx,%ecx { Zero division ends up here with ecx = 0. }
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jz div_qword_throwdivbyzero
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movl %edx,%eax
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xorl %edx,%edx
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divl %ecx
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push %eax { eax = future hi(result); remember }
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movl 4+4(%esp),%eax { eax = lo(z) }
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divl %ecx
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pop %edx
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ret $16
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.Lqworddivbigdivisor:
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push %ebx
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push %esi
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push %edi
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movl 12+12(%esp),%ebx { ebx = lo(n) }
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movl 12+8(%esp),%edx { edx = hi(z) }
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movl 12+4(%esp),%eax { eax = lo(z) }
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movl %ecx,%edi
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shrl $1,%edx
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rcrl $1,%eax
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rorl $1,%edi
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rcrl $1,%ebx
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bsrl %ecx,%ecx
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shrdl %cl,%edi,%ebx
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shrdl %cl,%edx,%eax
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shrl %cl,%edx
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roll $1,%edi
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divl %ebx
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movl 12+4(%esp),%ebx
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movl %eax,%esi // save quotient to esi
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imull %eax,%edi
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mull 12+12(%esp)
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addl %edi,%edx
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setcb %cl // cl:edx:eax = 65 bits quotient*divisor
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movl 12+8(%esp),%edi // edi:ebx = dividend
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subl %eax,%ebx
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movb $0,%al
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sbbl %edx,%edi
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sbbb %cl,%al
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sbbl $0,%esi
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xorl %edx,%edx
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movl %esi,%eax
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pop %edi
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pop %esi
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pop %ebx
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end;
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{$define FPC_SYSTEM_HAS_MOD_QWORD}
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function fpc_mod_qword(n,z : qword) : qword;assembler;nostackframe;[public,alias: 'FPC_MOD_QWORD']; compilerproc;
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{ n = [esp + 12], z = [esp + 4]. }
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asm
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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movl 16(%esp),%ecx { ecx = hi(n) }
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movl 8(%esp),%edx { edx = hi(z) }
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test %ecx,%ecx
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jnz .Lqwordmodr_big_divisior
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movl 12(%esp),%ecx { ecx = lo(n) }
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movl 4(%esp),%eax { eax = lo(z) }
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cmpl %ecx,%edx
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jae .Lqwordmodr_two_divs
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divl %ecx
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movl %edx,%eax
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xorl %edx,%edx
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ret $16
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.Lqwordmodr_two_divs:
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test %ecx,%ecx { Zero division ends up here with ecx = 0. }
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jz div_qword_throwdivbyzero
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movl %edx,%eax
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xorl %edx,%edx
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divl %ecx
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movl 4(%esp),%eax { eax = lo(z) }
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divl %ecx
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movl %edx,%eax
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xorl %edx,%edx
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ret $16
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.Lqwordmodr_big_divisior:
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push %ebx
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push %edi
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movl 8+12(%esp),%ebx { ebx = lo(n) }
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movl 8+4(%esp),%eax { eax = lo(z) }
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movl %ecx,%edi
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shrl $1,%edx
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rcrl $1,%eax
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rorl $1,%edi
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rcrl $1,%ebx
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bsrl %ecx,%ecx
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shrdl %cl,%edi,%ebx
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shrdl %cl,%edx,%eax
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shrl %cl,%edx
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roll $1,%edi
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divl %ebx
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movl 8+4(%esp),%ebx { lo(z) }
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imull %eax,%edi
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mull 8+12(%esp) { lo(n) }
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addl %edi,%edx
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setcb %cl // cl:edx:eax = 65 bits quotient*divisor
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movl 8+8(%esp),%edi { hi(z) }
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subl %eax,%ebx // subtract (quotient*divisor) from dividend
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movb $0,%al
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sbbl %edx,%edi
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sbbb %cl,%al // if carry is set now, the quotient was off by 1,
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// and we need to add divisor to result
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movl 8+12(%esp),%eax { lo(n) }
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sbbl %edx,%edx
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andl %edx,%eax
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andl 8+16(%esp),%edx { hi(n) }
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addl %ebx,%eax
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adcl %edi,%edx
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pop %edi
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pop %ebx
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end;
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{$define FPC_SYSTEM_HAS_MUL_QWORD}
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function fpc_mul_qword(f1,f2 : qword) : qword;[public,alias: 'FPC_MUL_QWORD']; compilerproc;
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begin
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{ the following piece of code is taken from the
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AMD Athlon Processor x86 Code Optimization manual }
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asm
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movl f1+4,%edx
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movl f2+4,%ecx
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orl %ecx,%edx
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movl f2,%edx
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movl f1,%eax
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jnz .Lqwordmultwomul
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{ if both upper dwords are =0 then it cannot overflow }
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mull %edx
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jmp .Lqwordmulready
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.Lqwordmultwomul:
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imul f1+4,%edx
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imul %eax,%ecx
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addl %edx,%ecx
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mull f2
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add %ecx,%edx
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.Lqwordmulready:
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movl %eax,__RESULT
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movl %edx,__RESULT+4
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.Lend:
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end [ 'eax','edx','ecx'];
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end;
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function mul_qword_throwoverflow(f1,f2 : qword) : qword;
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begin
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HandleErrorFrame(215,get_frame);
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end;
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function fpc_mul_qword_checkoverflow(f1,f2 : qword) : qword;assembler;nostackframe;[public,alias: 'FPC_MUL_QWORD_CHECKOVERFLOW']; compilerproc;
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{ f1 = [esp + 12], f2 = [esp + 4]. }
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asm
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{ the following piece of code is taken from the
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AMD Athlon Processor x86 Code Optimization manual }
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movl 16(%esp),%edx { edx = hi(f1) }
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movl 8(%esp),%ecx { ecx = hi(f2) }
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orl %ecx,%edx
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movl 4(%esp),%edx { edx = lo(f2) }
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movl 12(%esp),%eax { eax = lo(f1) }
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jnz .Loverflowchecked
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{ if both upper dwords are =0 then it cannot overflow }
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mull %edx
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ret $16
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.Loverflowed:
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jmp mul_qword_throwoverflow
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.Loverflowchecked:
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{ if both upper dwords are <>0 then it overflows always }
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test %ecx,%ecx
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jz .Loverok1
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cmpl $0,16(%esp)
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jnz .Loverflowed
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.Loverok1:
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{ overflow checked code }
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movl 16(%esp),%eax { eax = hi(f1) }
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mull 4(%esp)
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movl %eax,%ecx
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jc .Loverflowed
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movl 12(%esp),%eax { eax = lo(f1) }
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mull 8(%esp)
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jc .Loverflowed
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addl %eax,%ecx
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jc .Loverflowed
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movl 4(%esp),%eax
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mull 12(%esp)
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addl %ecx,%edx
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jc .Loverflowed
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end;
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