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https://gitlab.com/freepascal.org/fpc/source.git
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fb81b7ebbb
* tregisteralloctor renamed to trgobj * removed rgobj from a lot of units * moved location_* and reference_* to cgobj * first things for mmx register allocation
200 lines
7.3 KiB
ObjectPascal
200 lines
7.3 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate for x86-64 and i386 assembler for type converting nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nx86cnv;
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{$i fpcdefs.inc}
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interface
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uses
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node,ncgcnv,defutil,defcmp;
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type
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tx86typeconvnode = class(tcgtypeconvnode)
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protected
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{ procedure second_int_to_int;override; }
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{ procedure second_string_to_string;override; }
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{ procedure second_cstring_to_pchar;override; }
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{ procedure second_string_to_chararray;override; }
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{ procedure second_array_to_pointer;override; }
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{ procedure second_pointer_to_array;override; }
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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{ function first_int_to_real: tnode; override; }
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{ procedure second_int_to_real;override; }
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{ procedure second_real_to_real;override; }
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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{ procedure second_bool_to_int;override; }
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procedure second_int_to_bool;override;
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{ procedure second_load_smallset;override; }
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{ procedure second_ansistring_to_pchar;override; }
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{ procedure second_pchar_to_string;override; }
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{ procedure second_class_to_intf;override; }
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{ procedure second_char_to_char;override; }
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end;
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implementation
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uses
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verbose,systems,globals,
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aasmbase,aasmtai,
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cgbase,pass_2,
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ncon,ncal,ncnv,
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cpubase,
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cgobj,ncgutil;
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procedure tx86typeconvnode.second_int_to_bool;
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var
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hregister : tregister;
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href : treference;
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resflags : tresflags;
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hlabel,oldtruelabel,oldfalselabel : tasmlabel;
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begin
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oldtruelabel:=truelabel;
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oldfalselabel:=falselabel;
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objectlibrary.getlabel(truelabel);
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objectlibrary.getlabel(falselabel);
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secondpass(left);
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if codegenerror then
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exit;
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{ byte(boolean) or word(wordbool) or longint(longbool) must }
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{ be accepted for var parameters }
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if (nf_explicit in flags) and
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(left.resulttype.def.size=resulttype.def.size) and
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(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then
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begin
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location_copy(location,left.location);
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truelabel:=oldtruelabel;
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falselabel:=oldfalselabel;
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exit;
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end;
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{ Load left node into flag F_NE/F_E }
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resflags:=F_NE;
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case left.location.loc of
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LOC_CREFERENCE,
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LOC_REFERENCE :
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begin
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{$ifndef cpu64bit}
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if left.location.size in [OS_64,OS_S64] then
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begin
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location_release(exprasmlist,left.location);
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hregister:=cg.getintregister(exprasmlist,OS_INT);
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cg.a_load_ref_reg(exprasmlist,OS_32,OS_32,left.location.reference,hregister);
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href:=left.location.reference;
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inc(href.offset,4);
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cg.ungetregister(exprasmlist,hregister);
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cg.a_op_ref_reg(exprasmlist,OP_OR,OS_32,href,hregister);
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end
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else
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{$endif cpu64bit}
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begin
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location_force_reg(exprasmlist,left.location,left.location.size,true);
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location_release(exprasmlist,left.location);
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cg.a_op_reg_reg(exprasmlist,OP_OR,left.location.size,left.location.register,left.location.register);
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end;
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end;
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LOC_FLAGS :
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begin
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resflags:=left.location.resflags;
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end;
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LOC_REGISTER,LOC_CREGISTER :
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begin
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{$ifndef cpu64bit}
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if left.location.size in [OS_64,OS_S64] then
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begin
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hregister:=cg.getintregister(exprasmlist,OS_32);
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cg.a_load_reg_reg(exprasmlist,OS_32,OS_32,left.location.registerlow,hregister);
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cg.ungetregister(exprasmlist,hregister);
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location_release(exprasmlist,left.location);
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cg.a_op_reg_reg(exprasmlist,OP_OR,OS_32,left.location.registerhigh,hregister);
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end
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else
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{$endif cpu64bit}
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begin
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location_release(exprasmlist,left.location);
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cg.a_op_reg_reg(exprasmlist,OP_OR,left.location.size,left.location.register,left.location.register);
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end;
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end;
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LOC_JUMP :
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begin
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hregister:=cg.getintregister(exprasmlist,OS_INT);
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objectlibrary.getlabel(hlabel);
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cg.a_label(exprasmlist,truelabel);
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cg.a_load_const_reg(exprasmlist,OS_INT,1,hregister);
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cg.a_jmp_always(exprasmlist,hlabel);
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cg.a_label(exprasmlist,falselabel);
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cg.a_load_const_reg(exprasmlist,OS_INT,0,hregister);
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cg.a_label(exprasmlist,hlabel);
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cg.ungetregister(exprasmlist,hregister);
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cg.a_op_reg_reg(exprasmlist,OP_OR,OS_INT,hregister,hregister);
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end;
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else
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internalerror(10062);
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end;
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{ load flags to register }
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
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location.register:=cg.getintregister(exprasmlist,location.size);
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cg.g_flags2reg(exprasmlist,location.size,resflags,location.register);
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truelabel:=oldtruelabel;
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falselabel:=oldfalselabel;
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end;
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end.
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{
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$Log$
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Revision 1.7 2003-10-10 17:48:14 peter
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* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
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* tregisteralloctor renamed to trgobj
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* removed rgobj from a lot of units
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* moved location_* and reference_* to cgobj
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* first things for mmx register allocation
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Revision 1.6 2003/10/09 21:31:38 daniel
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* Register allocator splitted, ans abstract now
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Revision 1.5 2003/10/01 20:34:51 peter
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* procinfo unit contains tprocinfo
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* cginfo renamed to cgbase
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* moved cgmessage to verbose
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* fixed ppc and sparc compiles
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Revision 1.4 2003/09/28 21:48:57 peter
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* fix register leak
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Revision 1.3 2003/09/03 15:55:02 peter
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* NEWRA branch merged
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Revision 1.2.2.1 2003/08/31 15:46:26 peter
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* more updates for tregister
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Revision 1.2 2003/05/22 21:33:31 peter
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* removed some unit dependencies
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Revision 1.1 2003/05/01 08:02:42 florian
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* i386 and x86-64 share second_int_to_bool, moved to nx86cnv.pas
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}
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