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474 lines
21 KiB
ObjectPascal
474 lines
21 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1993-98 by Florian Klaempfl
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Generate m68k assembler for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cg68kmat;
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interface
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uses
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tree;
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procedure secondmoddiv(var p : ptree);
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procedure secondshlshr(var p : ptree);
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procedure secondumminus(var p : ptree);
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procedure secondnot(var p : ptree);
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implementation
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uses
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globtype,systems,symconst,
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cobjects,verbose,globals,
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symtable,aasm,types,
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hcodegen,temp_gen,pass_2,
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cpubase,cga68k,tgen68k;
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{*****************************************************************************
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SecondModDiv
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*****************************************************************************}
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{ D0 and D1 used as temp (ok) }
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procedure secondmoddiv(var p : ptree);
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var
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hreg1 : tregister;
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power : longint;
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hl : pasmlabel;
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reg: tregister;
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pushed: boolean;
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hl1: pasmlabel;
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begin
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secondpass(p^.left);
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set_location(p^.location,p^.left^.location);
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pushed:=maybe_push(p^.right^.registers32,p);
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secondpass(p^.right);
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if pushed then restore(p);
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{ put numerator in register }
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if p^.left^.location.loc<>LOC_REGISTER then
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begin
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if p^.left^.location.loc=LOC_CREGISTER then
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begin
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hreg1:=getregister32;
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emit_reg_reg(A_MOVE,S_L,p^.left^.location.register,hreg1);
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end
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else
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begin
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del_reference(p^.left^.location.reference);
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hreg1:=getregister32;
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_L,newreference(p^.left^.location.reference),
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hreg1)));
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end;
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clear_location(p^.left^.location);
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p^.left^.location.loc:=LOC_REGISTER;
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p^.left^.location.register:=hreg1;
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end
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else hreg1:=p^.left^.location.register;
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if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
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ispowerof2(p^.right^.value,power) then
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begin
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exprasmlist^.concat(new(paicpu, op_reg(A_TST, S_L, hreg1)));
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getlabel(hl);
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emitl(A_BPL,hl);
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if (power = 1) then
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exprasmlist^.concat(new(paicpu, op_const_reg(A_ADDQ, S_L,1, hreg1)))
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else
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Begin
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{ optimize using ADDQ if possible! }
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if (p^.right^.value-1) < 9 then
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exprasmlist^.concat(new(paicpu, op_const_reg(A_ADDQ, S_L,p^.right^.value-1, hreg1)))
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else
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exprasmlist^.concat(new(paicpu, op_const_reg(A_ADD, S_L,p^.right^.value-1, hreg1)));
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end;
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emitl(A_LABEL, hl);
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if (power > 0) and (power < 9) then
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exprasmlist^.concat(new(paicpu, op_const_reg(A_ASR, S_L,power, hreg1)))
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else
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begin
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exprasmlist^.concat(new(paicpu, op_const_reg(A_MOVE,S_L,power, R_D0)));
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exprasmlist^.concat(new(paicpu, op_reg_reg(A_ASR,S_L,R_D0, hreg1)));
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end;
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end
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else
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begin
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{ bring denominator to D1 }
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{ D1 is always free, it's }
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{ only used for temporary }
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{ purposes }
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if (p^.right^.location.loc<>LOC_REGISTER) and
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(p^.right^.location.loc<>LOC_CREGISTER) then
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begin
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del_reference(p^.right^.location.reference);
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p^.left^.location.loc:=LOC_REGISTER;
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_L,newreference(p^.right^.location.reference),R_D1)));
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end
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else
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begin
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ungetregister32(p^.right^.location.register);
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emit_reg_reg(A_MOVE,S_L,p^.right^.location.register,R_D1);
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end;
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{ on entering this section D1 should contain the divisor }
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if (aktoptprocessor = MC68020) then
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begin
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{ Check if divisor is ZERO - if so call HALT_ERROR }
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{ with d0 = 200 (Division by zero!) }
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getlabel(hl1);
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exprasmlist^.concat(new(paicpu,op_reg(A_TST,S_L,R_D1)));
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{ if not zero then simply continue on }
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emitl(A_BNE,hl1);
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exprasmlist^.concat(new(paicpu,op_const_reg(A_MOVE,S_L,200,R_D0)));
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emitcall('FPC_HALT_ERROR',true);
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emitl(A_LABEL,hl1);
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if (p^.treetype = modn) then
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Begin
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reg := getregister32;
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exprasmlist^.concat(new(paicpu,op_reg(A_CLR,S_L,reg)));
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getlabel(hl);
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{ here what we do is prepare the high register with the }
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{ correct sign. i.e we clear it, check if the low dword reg }
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{ which will participate in the division is signed, if so we}
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{ we extend the sign to the high doword register by inverting }
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{ all the bits. }
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exprasmlist^.concat(new(paicpu,op_reg(A_TST,S_L,hreg1)));
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emitl(A_BPL,hl);
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exprasmlist^.concat(new(paicpu,op_reg(A_NOT,S_L,reg)));
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emitl(A_LABEL,hl);
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{ reg:hreg1 / d1 }
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exprasmlist^.concat(new(paicpu,op_reg_reg_reg(A_DIVSL,S_L,R_D1,reg,hreg1)));
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{ hreg1 already contains quotient }
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{ looking for remainder }
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exprasmlist^.concat(new(paicpu,op_reg_reg(A_MOVE,S_L,reg,hreg1)));
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ungetregister32(reg);
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end
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else
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{ simple division... }
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Begin
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{ reg:hreg1 / d1 }
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exprasmlist^.concat(new(paicpu,op_reg_reg(A_DIVS,S_L,R_D1,hreg1)));
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end;
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end
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else { MC68000 operations }
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begin
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{ put numerator in d0 }
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emit_reg_reg(A_MOVE,S_L,hreg1,R_D0);
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{ operation to perform on entry to both }
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{ routines... d0/d1 }
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{ return result in d0 }
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if p^.treetype = divn then
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emitcall('FPC_LONGDIV',true)
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else
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emitcall('FPC_LONGMOD',true);
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emit_reg_reg(A_MOVE,S_L,R_D0,hreg1);
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end; { endif }
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end;
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{ this registers are always used when div/mod are present }
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usedinproc:=usedinproc or ($800 shr word(R_D1));
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usedinproc:=usedinproc or ($800 shr word(R_D0));
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clear_location(p^.location);
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p^.location.loc:=LOC_REGISTER;
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p^.location.register:=hreg1;
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end;
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{*****************************************************************************
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SecondShlShr
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*****************************************************************************}
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{ D6 used as scratch (ok) }
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procedure secondshlshr(var p : ptree);
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var
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hregister1,hregister2,hregister3 : tregister;
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op : tasmop;
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pushed : boolean;
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begin
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secondpass(p^.left);
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pushed:=maybe_push(p^.right^.registers32,p);
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secondpass(p^.right);
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if pushed then restore(p);
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{ load left operators in a register }
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if p^.left^.location.loc<>LOC_REGISTER then
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begin
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if p^.left^.location.loc=LOC_CREGISTER then
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begin
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hregister1:=getregister32;
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emit_reg_reg(A_MOVE,S_L,p^.left^.location.register,
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hregister1);
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end
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else
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begin
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del_reference(p^.left^.location.reference);
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hregister1:=getregister32;
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_L,newreference(p^.left^.location.reference),
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hregister1)));
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end;
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end
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else hregister1:=p^.left^.location.register;
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{ determine operator }
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if p^.treetype=shln then
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op:=A_LSL
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else
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op:=A_LSR;
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{ shifting by a constant directly decode: }
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if (p^.right^.treetype=ordconstn) then
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begin
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if (p^.right^.location.reference.offset and 31 > 0) and (p^.right^.location.reference.offset and 31 < 9) then
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exprasmlist^.concat(new(paicpu,op_const_reg(op,S_L,p^.right^.location.reference.offset and 31,
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hregister1)))
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else
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begin
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exprasmlist^.concat(new(paicpu,op_const_reg(A_MOVE,S_L,p^.right^.location.reference.offset and 31,
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R_D6)));
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exprasmlist^.concat(new(paicpu,op_reg_reg(op,S_L,R_D6,hregister1)));
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end;
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p^.location.loc:=LOC_REGISTER;
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p^.location.register:=hregister1;
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end
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else
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begin
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{ load right operators in a register }
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if p^.right^.location.loc<>LOC_REGISTER then
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begin
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if p^.right^.location.loc=LOC_CREGISTER then
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begin
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hregister2:=getregister32;
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emit_reg_reg(A_MOVE,S_L,p^.right^.location.register,
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hregister2);
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end
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else
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begin
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del_reference(p^.right^.location.reference);
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hregister2:=getregister32;
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_L,newreference(p^.right^.location.reference),
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hregister2)));
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end;
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end
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else hregister2:=p^.right^.location.register;
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emit_reg_reg(op,S_L,hregister2,hregister1);
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p^.location.register:=hregister1;
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end;
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{ this register is always used when shl/shr are present }
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usedinproc:=usedinproc or ($800 shr byte(R_D6));
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end;
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{*****************************************************************************
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SecondUmMinus
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*****************************************************************************}
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procedure secondumminus(var p : ptree);
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begin
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secondpass(p^.left);
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p^.location.loc:=LOC_REGISTER;
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case p^.left^.location.loc of
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LOC_REGISTER : begin
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p^.location.register:=p^.left^.location.register;
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exprasmlist^.concat(new(paicpu,op_reg(A_NEG,S_L,p^.location.register)));
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end;
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LOC_CREGISTER : begin
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p^.location.register:=getregister32;
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emit_reg_reg(A_MOVE,S_L,p^.location.register,
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p^.location.register);
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exprasmlist^.concat(new(paicpu,op_reg(A_NEG,S_L,p^.location.register)));
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end;
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LOC_REFERENCE,LOC_MEM :
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begin
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del_reference(p^.left^.location.reference);
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{ change sign of a floating point }
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{ in the case of emulation, get }
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{ a free register, and change sign }
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{ manually. }
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{ otherwise simply load into an FPU}
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{ register. }
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if (p^.left^.resulttype^.deftype=floatdef) and
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(pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
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begin
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{ move to FPU }
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floatload(pfloatdef(p^.left^.resulttype)^.typ,
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p^.left^.location.reference,p^.location);
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if (cs_fp_emulation) in aktmoduleswitches then
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{ if in emulation mode change sign manually }
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exprasmlist^.concat(new(paicpu,op_const_reg(A_BCHG,S_L,31,
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p^.location.fpureg)))
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else
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exprasmlist^.concat(new(paicpu,op_reg(A_FNEG,S_FX,
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p^.location.fpureg)));
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end
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else
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begin
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p^.location.register:=getregister32;
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_L,
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newreference(p^.left^.location.reference),
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p^.location.register)));
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exprasmlist^.concat(new(paicpu,op_reg(A_NEG,S_L,p^.location.register)));
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end;
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end;
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LOC_FPU : begin
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p^.location.loc:=LOC_FPU;
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p^.location.fpureg := p^.left^.location.fpureg;
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if (cs_fp_emulation) in aktmoduleswitches then
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exprasmlist^.concat(new(paicpu,op_const_reg(A_BCHG,S_L,31,p^.location.fpureg)))
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else
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exprasmlist^.concat(new(paicpu,op_reg(A_FNEG,S_FX,p^.location.fpureg)));
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end;
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end;
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{ emitoverflowcheck;}
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end;
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{*****************************************************************************
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SecondNot
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*****************************************************************************}
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procedure secondnot(var p : ptree);
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const
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flagsinvers : array[F_E..F_BE] of tresflags =
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(F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
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F_A,F_AE,F_B,F_BE);
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var
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hl : pasmlabel;
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begin
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if (p^.resulttype^.deftype=orddef) and
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(porddef(p^.resulttype)^.typ=bool8bit) then
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begin
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case p^.location.loc of
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LOC_JUMP : begin
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hl:=truelabel;
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truelabel:=falselabel;
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falselabel:=hl;
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secondpass(p^.left);
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maketojumpbool(p^.left);
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hl:=truelabel;
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truelabel:=falselabel;
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falselabel:=hl;
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end;
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LOC_FLAGS : begin
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secondpass(p^.left);
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p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
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end;
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LOC_REGISTER : begin
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secondpass(p^.left);
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p^.location.register:=p^.left^.location.register;
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exprasmlist^.concat(new(paicpu,op_const_reg(A_EOR,S_B,1,p^.location.register)));
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end;
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LOC_CREGISTER : begin
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secondpass(p^.left);
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p^.location.loc:=LOC_REGISTER;
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p^.location.register:=getregister32;
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emit_reg_reg(A_MOVE,S_B,p^.left^.location.register,
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p^.location.register);
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exprasmlist^.concat(new(paicpu,op_const_reg(A_EOR,S_B,1,p^.location.register)));
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end;
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LOC_REFERENCE,LOC_MEM : begin
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secondpass(p^.left);
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del_reference(p^.left^.location.reference);
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p^.location.loc:=LOC_REGISTER;
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p^.location.register:=getregister32;
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if p^.left^.location.loc=LOC_CREGISTER then
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emit_reg_reg(A_MOVE,S_B,p^.left^.location.register,
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p^.location.register)
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else
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_B,
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newreference(p^.left^.location.reference),
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p^.location.register)));
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exprasmlist^.concat(new(paicpu,op_const_reg(A_EOR,S_B,1,p^.location.register)));
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end;
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end;
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end
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else
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begin
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secondpass(p^.left);
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p^.location.loc:=LOC_REGISTER;
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case p^.left^.location.loc of
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LOC_REGISTER : begin
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p^.location.register:=p^.left^.location.register;
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exprasmlist^.concat(new(paicpu,op_reg(A_NOT,S_L,p^.location.register)));
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end;
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LOC_CREGISTER : begin
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p^.location.register:=getregister32;
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emit_reg_reg(A_MOVE,S_L,p^.left^.location.register,
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p^.location.register);
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exprasmlist^.concat(new(paicpu,op_reg(A_NOT,S_L,p^.location.register)));
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end;
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LOC_REFERENCE,LOC_MEM :
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begin
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del_reference(p^.left^.location.reference);
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p^.location.register:=getregister32;
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exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOVE,S_L,
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newreference(p^.left^.location.reference),
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p^.location.register)));
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exprasmlist^.concat(new(paicpu,op_reg(A_NOT,S_L,p^.location.register)));
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end;
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end;
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{if p^.left^.location.loc=loc_register then
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p^.location.register:=p^.left^.location.register
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else
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begin
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del_locref(p^.left^.location);
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p^.location.register:=getregister32;
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exprasmlist^.concat(new(paicpu,op_loc_reg(A_MOV,S_L,
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p^.left^.location,
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p^.location.register)));
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end;
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exprasmlist^.concat(new(paicpu,op_reg(A_NOT,S_L,p^.location.register)));}
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end;
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end;
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end.
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{
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$Log$
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Revision 1.5 1999-09-16 23:05:51 florian
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* m68k compiler is again compilable (only gas writer, no assembler reader)
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Revision 1.4 1998/12/11 00:03:05 peter
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+ globtype,tokens,version unit splitted from globals
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Revision 1.3 1998/10/13 16:50:10 pierre
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* undid some changes of Peter that made the compiler wrong
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for m68k (I had to reinsert some ifdefs)
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* removed several memory leaks under m68k
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* removed the meory leaks for assembler readers
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* cross compiling shoud work again better
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( crosscompiling sysamiga works
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but as68k still complain about some code !)
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Revision 1.2 1998/09/14 10:44:01 peter
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* all internal RTL functions start with FPC_
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Revision 1.1 1998/09/01 09:07:09 peter
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* m68k fixes, splitted cg68k like cgi386
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|
|
}
|