Pierre Muller ce702df526 Take care about endianess in arm instruction binary code generator		2024-06-11 01:05:51 +02:00
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aasmcpu.pas	Take care about endianess in arm instruction binary code generator	2024-06-11 01:05:51 +02:00
agarmgas.pas
agarmvasm.pas
aoptcpu.pas	* arm / a64: Extended the AND; CMP -> ANDS family of optimisations to catch BIC as well as AND	2024-04-20 12:55:47 +00:00
aoptcpub.pas
aoptcpud.pas
armatt.inc
armatts.inc
armins.dat
armnop.inc
armop.inc
armreg.dat
armtab.inc
cgcpu.pas	* unified g_concatcopy_move	2024-05-15 22:52:24 +02:00
cpubase.pas
cpuelf.pas
cpuinfo.pas	+ enable cs_opt_consts on arm as well	2024-05-07 22:40:13 +02:00
cpunode.pas	* arm / a64: TAsmNode debugging info is now output for ARM and AArch64	2024-05-30 20:04:11 +00:00
cpupara.pas
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
narmadd.pas	+ set pi_do_call on ARM as well if we check for fpu exceptions	2024-02-17 21:03:55 +01:00
narmcal.pas
narmcnv.pas
narmcon.pas
narminl.pas	* overflow checking for generic abs(<int64>)	2024-03-29 20:06:23 +01:00
narmld.pas
narmmat.pas
narmmem.pas
narmset.pas
narmutil.pas	* Fixed signature of insert_init_final_table	2024-03-05 07:56:14 +00:00
pp.lpi.template
raarm.pas
raarmgas.pas
rarmcon.inc
rarmdwa.inc
rarmnor.inc
rarmnum.inc
rarmrni.inc
rarmsri.inc
rarmsta.inc
rarmstd.inc
rarmsup.inc
rgcpu.pas
symcpu.pas
tripletcpu.pas