Jonas Maebe f36e5411af * split cpu64bit compiler define into ... a) cpu64bitaddr, which means that we are generating a compiler which will generate code for targets with a 64 bit address space/abi b) cpu64bitalu, which means that we are generating a compiler which will generate code for a cpu with support for 64 bit integer operations (possibly running in a 32 bit address space, depending on the cpu64bitaddr define) All cpus which had cpu64bit set now have both the above defines set, and none of the 32 bit cpus have cpu64bitalu set (and none will compile with it currently) + pint and puint types, similar to aint/aword (not pword because that that conflicts with pword=^word) * several changes from aint/aword to pint/pword * some changes of tcgsize2size[OS_INT] to sizeof(pint) git-svn-id: trunk@10320 -		2008-02-13 20:44:00 +00:00
..
aoptcpu.pas
aoptcpub.pas
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas	* split cpu64bit compiler define into	2008-02-13 20:44:00 +00:00
cpubase.pas	+ default code now preserves mm registers	2007-10-27 12:02:28 +00:00
cpuinfo.pas
cpunode.pas	* Merged 2.3 branch changes:	2007-03-04 20:16:57 +00:00
cpupara.pas	* split cpu64bit compiler define into	2008-02-13 20:44:00 +00:00
cpupi.pas	* split cpu64bit compiler define into	2008-02-13 20:44:00 +00:00
cputarg.pas	* Merged 2.3 branch changes:	2007-03-04 20:16:57 +00:00
itcpugas.pas	* r8717 for ppc64 (fixed compilation after r8715)	2007-10-02 08:31:04 +00:00
nppcadd.pas	* fixed missing swapleftright in case of substracting unsigned numbers	2007-03-13 12:57:06 +00:00
nppccal.pas
nppccnv.pas	* remove registers{int/mmx/fpu} from firstpass	2007-09-26 21:12:01 +00:00
nppcld.pas
nppcmat.pas	* Rework the constexprint to allow operations from low(int64) to high(qword).	2007-06-13 07:41:18 +00:00
ppcins.dat
ppcreg.dat
rappc.pas
rappcgas.pas	+ PIC support for darwin/ppc64	2007-10-20 20:14:45 +00:00
rppccon.inc
rppcdwrf.inc
rppcgas.inc
rppcgri.inc
rppcgss.inc
rppcmot.inc
rppcmri.inc
rppcnor.inc
rppcnum.inc
rppcrni.inc
rppcsri.inc
rppcstab.inc
rppcstd.inc
rppcsup.inc