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https://gitlab.com/freepascal.org/fpc/source.git
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329 lines
10 KiB
ObjectPascal
329 lines
10 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2002 by Florian Klaempfl
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This unit implements the SPARC specific class for the register
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allocator
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************}
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unit rgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,aasmcpu,aasmtai,
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cgbase,
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cpubase,
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rgobj;
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type
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trgcpu=class(trgobj)
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procedure add_constraints(reg:tregister);override;
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function get_spill_subreg(r : tregister) : tsubregister;override;
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procedure do_spill_read(list : taasmoutput;instr : taicpu;pos: tai; regidx: word;
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const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);override;
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procedure do_spill_written(list : taasmoutput;instr : taicpu;pos: tai; regidx: word;
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const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);override;
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procedure do_spill_readwritten(list : taasmoutput;instr : taicpu;pos: tai; regidx: word;
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const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);override;
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end;
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implementation
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uses
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verbose, cutils,
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cgutils,cgobj,
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procinfo;
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procedure trgcpu.add_constraints(reg:tregister);
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var
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supreg,i: Tsuperregister;
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r: Tregister;
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begin
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{ Let 64bit floats conflict with all odd float regs }
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if getsubreg(reg)=R_SUBFD then
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begin
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supreg:=getsupreg(reg);
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i:=RS_F1;
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while (i<=RS_F31) do
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begin
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add_edge(supreg,i);
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inc(i,2);
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end;
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end;
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end;
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function trgcpu.get_spill_subreg(r : tregister) : tsubregister;
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begin
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if getregtype(r)=R_FPUREGISTER then
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result:=getsubreg(r)
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else
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result:=defaultsub;
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end;
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procedure trgcpu.do_spill_read(list : taasmoutput;instr : taicpu;pos: tai; regidx: word;
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const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);
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var
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helpins: tai;
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tmpref,ref : treference;
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helplist : taasmoutput;
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l : tasmlabel;
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tmpreg : tregister;
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begin
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ref:=spilltemplist[regs[regidx].orgreg];
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if abs(ref.offset)>4095 then
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begin
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helplist:=taasmoutput.create;
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reference_reset(tmpref);
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if getregtype(regs[regidx].tempreg)=R_INTREGISTER then
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getregisterinline(helplist,pos,defaultsub,tmpreg)
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else
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tmpreg:=cg.getintregister(helplist,OS_ADDR);
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tmpref.offset:=ref.offset;
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tmpref.refaddr:=addr_hi;
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helplist.concat(taicpu.op_ref_reg(A_SETHI,tmpref,tmpreg));
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tmpref.refaddr:=addr_lo;
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helplist.concat(taicpu.op_reg_ref_reg(A_OR,tmpreg,tmpref,tmpreg));
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if ref.index<>NR_NO then
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internalerror(200401263);
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ref.index:=tmpreg;
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ref.offset:=0;
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helpins:=spilling_create_load(ref,regs[regidx].tempreg);
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helplist.concat(helpins);
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if pos=nil then
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list.insertlistafter(list.first,helplist)
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else
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list.insertlistafter(pos.next,helplist);
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ungetregisterinline(list,helpins,regs[regidx].tempreg);
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if getregtype(regs[regidx].tempreg)=R_INTREGISTER then
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ungetregisterinline(list,helpins,tmpreg);
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forward_allocation(tai(helpins.next),instr);
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helplist.free;
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end
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else
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inherited do_spill_read(list,instr,pos,regidx,spilltemplist,regs);
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end;
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procedure trgcpu.do_spill_written(list : taasmoutput;instr : taicpu;pos: tai; regidx: word;
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const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);
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var
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helpins: tai;
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ref,tmpref : treference;
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helplist : taasmoutput;
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l : tasmlabel;
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tmpreg : tregister;
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begin
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ref:=spilltemplist[regs[regidx].orgreg];
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if abs(ref.offset)>4095 then
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begin
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helplist:=taasmoutput.create;
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reference_reset(tmpref);
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if getregtype(regs[regidx].tempreg)=R_INTREGISTER then
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getregisterinline(helplist,pos,defaultsub,tmpreg)
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else
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tmpreg:=cg.getintregister(helplist,OS_ADDR);
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tmpref.offset:=ref.offset;
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tmpref.refaddr:=addr_hi;
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helplist.concat(taicpu.op_ref_reg(A_SETHI,tmpref,tmpreg));
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tmpref.refaddr:=addr_lo;
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helplist.concat(taicpu.op_reg_ref_reg(A_OR,tmpreg,tmpref,tmpreg));
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if ref.index<>NR_NO then
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internalerror(200401263);
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ref.index:=tmpreg;
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ref.offset:=0;
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helplist.concat(spilling_create_store(regs[regidx].tempreg,ref));
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ungetregisterinline(list,tai(helplist.last),regs[regidx].tempreg);
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if getregtype(regs[regidx].tempreg)=R_INTREGISTER then
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ungetregisterinline(list,tai(helplist.last),tmpreg);
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list.insertlistafter(instr,helplist);
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helplist.free;
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end
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else
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inherited do_spill_written(list,instr,pos,regidx,spilltemplist,regs);
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end;
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procedure trgcpu.do_spill_readwritten(list : taasmoutput;instr : taicpu;pos: tai; regidx: word;
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const spilltemplist:Tspill_temp_list;const regs : tspillregsinfo);
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var
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helpins1, helpins2: tai;
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tmpref,ref : treference;
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helplist : taasmoutput;
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tmpreg : tregister;
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begin
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ref:=spilltemplist[regs[regidx].orgreg];
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if abs(ref.offset)>4095 then
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begin
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helplist:=taasmoutput.create;
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reference_reset(tmpref);
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if getregtype(regs[regidx].tempreg)=R_INTREGISTER then
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getregisterinline(helplist,pos,defaultsub,tmpreg)
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else
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tmpreg:=cg.getintregister(helplist,OS_ADDR);
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tmpref.offset:=ref.offset;
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tmpref.refaddr:=addr_hi;
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helplist.concat(taicpu.op_ref_reg(A_SETHI,tmpref,tmpreg));
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tmpref.refaddr:=addr_lo;
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helplist.concat(taicpu.op_reg_ref_reg(A_OR,tmpreg,tmpref,tmpreg));
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if ref.index<>NR_NO then
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internalerror(200401263);
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ref.index:=tmpreg;
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ref.offset:=0;
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helpins1:=spilling_create_load(ref,regs[regidx].tempreg);
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helplist.concat(helpins1);
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if pos=nil then
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list.insertlistafter(list.first,helplist)
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else
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list.insertlistafter(pos.next,helplist);
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helpins2:=spilling_create_store(regs[regidx].tempreg,ref);
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list.insertafter(helpins2,instr);
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ungetregisterinline(list,helpins2,regs[regidx].tempreg);
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if getregtype(regs[regidx].tempreg)=R_INTREGISTER then
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ungetregisterinline(list,helpins2,tmpreg);
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forward_allocation(tai(helpins1.next),instr);
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end
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else
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inherited do_spill_readwritten(list,instr,pos,regidx,spilltemplist,regs);
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end;
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end.
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{
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$Log$
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Revision 1.22 2004-06-20 08:47:33 florian
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* spilling of doubles on sparc fixed
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Revision 1.21 2004/06/16 20:07:11 florian
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* dwarf branch merged
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Revision 1.20.2.4 2004/06/13 20:38:38 florian
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* fixed floating point register spilling on sparc
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Revision 1.20.2.3 2004/06/13 10:51:17 florian
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* fixed several register allocator problems (sparc/arm)
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Revision 1.20.2.2 2004/06/03 19:23:41 florian
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* fixed some spilling issues
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Revision 1.20.2.1 2004/05/30 17:54:14 florian
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+ implemented cmp64bit
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* started to fix spilling
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* fixed int64 sub partially
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Revision 1.20 2003/10/24 15:20:37 peter
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* added more register functions
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Revision 1.19 2003/10/01 20:34:50 peter
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* procinfo unit contains tprocinfo
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* cginfo renamed to cgbase
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* moved cgmessage to verbose
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* fixed ppc and sparc compiles
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Revision 1.18 2003/09/14 19:19:05 peter
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* updates for new ra
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Revision 1.17 2003/09/03 15:55:01 peter
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* NEWRA branch merged
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Revision 1.16.2.2 2003/09/02 17:49:17 peter
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* newra updates
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Revision 1.16.2.1 2003/09/01 21:02:55 peter
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* sparc updates for new tregister
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Revision 1.16 2003/08/11 21:18:20 peter
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* start of sparc support for newra
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Revision 1.15 2003/07/02 22:18:04 peter
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* paraloc splitted in callerparaloc,calleeparaloc
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* sparc calling convention updates
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Revision 1.14 2003/06/17 16:36:11 peter
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* freeintparaloc added
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Revision 1.13 2003/06/12 22:47:52 mazen
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- unused temp var r removed in GetExplicitRegisterInt function
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* some case added for var and fauncions naming
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Revision 1.12 2003/06/12 21:11:44 peter
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* updates like the powerpc
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Revision 1.11 2003/06/01 21:38:07 peter
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* getregisterfpu size parameter added
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* op_const_reg size parameter added
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* sparc updates
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Revision 1.10 2003/05/31 01:00:51 peter
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* register fixes
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Revision 1.9 2003/04/22 10:09:35 daniel
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+ Implemented the actual register allocator
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+ Scratch registers unavailable when new register allocator used
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+ maybe_save/maybe_restore unavailable when new register allocator used
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Revision 1.8 2003/03/15 22:51:58 mazen
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* remaking sparc rtl compile
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Revision 1.7 2003/03/10 21:59:54 mazen
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* fixing index overflow in handling new registers arrays.
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Revision 1.6 2003/02/19 22:00:17 daniel
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* Code generator converted to new register notation
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- Horribily outdated todo.txt removed
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Revision 1.5 2003/01/08 18:43:58 daniel
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* Tregister changed into a record
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Revision 1.4 2002/10/13 21:46:07 mazen
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* assembler output format fixed
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Revision 1.3 2002/10/12 19:03:23 mazen
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* Get/Unget expilit registers to be re-examined
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}
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