mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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18eb495d0f
when using non-PIC references in assembler code when the compiler
is configured to generate PIC code (on ppc, sparc and arm, no
error message is given at all currently)
git-svn-id: trunk@9364 -
767 lines
22 KiB
ObjectPascal
767 lines
22 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
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Handles the common x86 assembler reader routines
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{
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Contains the common x86 (i386 and x86-64) assembler reader routines.
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}
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unit rax86;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,aasmtai,aasmdata,aasmcpu,
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cpubase,rautils,cclasses;
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{ Parser helpers }
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function is_prefix(t:tasmop):boolean;
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function is_override(t:tasmop):boolean;
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Function CheckPrefix(prefixop,op:tasmop): Boolean;
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Function CheckOverride(overrideop,op:tasmop): Boolean;
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Procedure FWaitWarning;
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type
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Tx86Operand=class(TOperand)
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opsize : topsize;
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Procedure SetSize(_size:longint;force:boolean);override;
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Procedure SetCorrectSize(opcode:tasmop);override;
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Function CheckOperand: boolean; override;
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end;
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Tx86Instruction=class(TInstruction)
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OpOrder : TOperandOrder;
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opsize : topsize;
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constructor Create(optype : tcoperand);override;
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{ Operand sizes }
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procedure AddReferenceSizes;
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procedure SetInstructionOpsize;
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procedure CheckOperandSizes;
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procedure CheckNonCommutativeOpcodes;
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procedure SwapOperands;
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{ opcode adding }
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function ConcatInstruction(p : TAsmList) : tai;override;
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end;
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const
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AsmPrefixes = 6;
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AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
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A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
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);
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AsmOverrides = 6;
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AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
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A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
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);
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CondAsmOps=3;
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CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
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A_CMOVcc, A_Jcc, A_SETcc
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);
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CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
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'CMOV','J','SET'
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);
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implementation
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uses
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globtype,globals,systems,verbose,
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procinfo,
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cpuinfo,cgbase,cgutils,
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itcpugas,cgx86;
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{*****************************************************************************
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Parser Helpers
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*****************************************************************************}
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function is_prefix(t:tasmop):boolean;
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var
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i : longint;
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Begin
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is_prefix:=false;
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for i:=1 to AsmPrefixes do
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if t=AsmPrefix[i-1] then
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begin
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is_prefix:=true;
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exit;
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end;
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end;
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function is_override(t:tasmop):boolean;
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var
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i : longint;
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Begin
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is_override:=false;
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for i:=1 to AsmOverrides do
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if t=AsmOverride[i-1] then
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begin
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is_override:=true;
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exit;
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end;
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end;
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Function CheckPrefix(prefixop,op:tasmop): Boolean;
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{ Checks if the prefix is valid with the following opcode }
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{ return false if not, otherwise true }
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Begin
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CheckPrefix := TRUE;
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(* Case prefix of
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A_REP,A_REPNE,A_REPE:
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Case opcode Of
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A_SCASB,A_SCASW,A_SCASD,
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A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
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Else
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Begin
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CheckPrefix := FALSE;
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exit;
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end;
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end; { case }
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A_LOCK:
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Case opcode Of
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A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
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A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
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Else
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Begin
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CheckPrefix := FALSE;
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Exit;
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end;
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end; { case }
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A_NONE: exit; { no prefix here }
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else
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CheckPrefix := FALSE;
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end; { end case } *)
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end;
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Function CheckOverride(overrideop,op:tasmop): Boolean;
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{ Check if the override is valid, and if so then }
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{ update the instr variable accordingly. }
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Begin
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CheckOverride := true;
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{ Case instr.getinstruction of
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A_MOVS,A_XLAT,A_CMPS:
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Begin
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CheckOverride := TRUE;
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Message(assem_e_segment_override_not_supported);
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end
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end }
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end;
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Procedure FWaitWarning;
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begin
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if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in current_settings.moduleswitches) then
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Message(asmr_w_fwait_emu_prob);
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end;
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{*****************************************************************************
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TX86Operand
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*****************************************************************************}
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Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
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begin
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inherited SetSize(_size,force);
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{ OS_64 will be set to S_L and be fixed later
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in SetCorrectSize }
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opsize:=TCGSize2Opsize[size];
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end;
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Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
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begin
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if gas_needsuffix[opcode]=attsufFPU then
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begin
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case size of
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OS_32 : opsize:=S_FS;
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OS_64 : opsize:=S_FL;
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end;
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end
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else if gas_needsuffix[opcode]=attsufFPUint then
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begin
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case size of
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OS_16 : opsize:=S_IS;
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OS_32 : opsize:=S_IL;
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OS_64 : opsize:=S_IQ;
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end;
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end;
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end;
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Function Tx86Operand.CheckOperand: boolean;
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begin
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result:=true;
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if (opr.typ=OPR_Reference) then
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begin
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if not hasvar then
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begin
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if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset>0) then
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begin
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if current_procinfo.procdef.proccalloption=pocall_register then
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message(asmr_w_no_direct_ebp_for_parameter)
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else
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message(asmr_w_direct_ebp_for_parameter_regcall);
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end
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else if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset<0) then
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message(asmr_w_direct_ebp_neg_offset)
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else if (getsupreg(opr.ref.base)=RS_ESP) and (opr.ref.offset<0) then
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message(asmr_w_direct_esp_neg_offset);
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end;
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if (cs_create_pic in current_settings.moduleswitches) and
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assigned(opr.ref.symbol) and
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not assigned(opr.ref.relsymbol) and
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(opr.ref.refaddr<>addr_pic) then
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begin
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message(asmr_e_need_pic_ref);
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result:=false;
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end;
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end;
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end;
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{*****************************************************************************
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T386Instruction
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*****************************************************************************}
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constructor Tx86Instruction.Create(optype : tcoperand);
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begin
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inherited Create(optype);
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Opsize:=S_NO;
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end;
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procedure Tx86Instruction.SwapOperands;
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begin
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Inherited SwapOperands;
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{ mark the correct order }
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if OpOrder=op_intel then
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OpOrder:=op_att
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else
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OpOrder:=op_intel;
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end;
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procedure Tx86Instruction.AddReferenceSizes;
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{ this will add the sizes for references like [esi] which do not
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have the size set yet, it will take only the size if the other
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operand is a register }
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var
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operand2,i : longint;
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s : tasmsymbol;
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so : aint;
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begin
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for i:=1 to ops do
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begin
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operands[i].SetCorrectSize(opcode);
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if tx86operand(operands[i]).opsize=S_NO then
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begin
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{$ifdef x86_64}
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if (opcode=A_MOVQ) and
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(ops=2) and
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(operands[1].opr.typ=OPR_CONSTANT) then
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opsize:=S_Q
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else
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{$endif x86_64}
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case operands[i].Opr.Typ of
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OPR_LOCAL,
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OPR_REFERENCE :
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begin
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if i=2 then
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operand2:=1
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else
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operand2:=2;
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if operand2<ops then
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begin
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{ Only allow register as operand to take the size from }
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if operands[operand2].opr.typ=OPR_REGISTER then
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begin
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if ((opcode<>A_MOVD) and
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(opcode<>A_CVTSI2SS)) then
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tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
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end
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else
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begin
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{ if no register then take the opsize (which is available with ATT),
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if not availble then give an error }
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if opsize<>S_NO then
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tx86operand(operands[i]).opsize:=opsize
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else
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begin
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if (m_delphi in current_settings.modeswitches) then
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Message(asmr_w_unable_to_determine_reference_size_using_dword)
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else
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Message(asmr_e_unable_to_determine_reference_size);
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{ recovery }
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tx86operand(operands[i]).opsize:=S_L;
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end;
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end;
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end
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else
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begin
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if opsize<>S_NO then
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tx86operand(operands[i]).opsize:=opsize
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end;
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end;
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OPR_SYMBOL :
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begin
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{ Fix lea which need a reference }
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if opcode=A_LEA then
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begin
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s:=operands[i].opr.symbol;
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so:=operands[i].opr.symofs;
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operands[i].opr.typ:=OPR_REFERENCE;
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Fillchar(operands[i].opr.ref,sizeof(treference),0);
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operands[i].opr.ref.symbol:=s;
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operands[i].opr.ref.offset:=so;
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end;
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{$ifdef x86_64}
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tx86operand(operands[i]).opsize:=S_Q;
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{$else x86_64}
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tx86operand(operands[i]).opsize:=S_L;
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{$endif x86_64}
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end;
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end;
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end;
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end;
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end;
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procedure Tx86Instruction.SetInstructionOpsize;
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begin
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if opsize<>S_NO then
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exit;
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if (OpOrder=op_intel) then
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SwapOperands;
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case ops of
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0 : ;
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1 :
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begin
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{ "push es" must be stored as a long PM }
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if ((opcode=A_PUSH) or
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(opcode=A_POP)) and
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(operands[1].opr.typ=OPR_REGISTER) and
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is_segment_reg(operands[1].opr.reg) then
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opsize:=S_L
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else
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opsize:=tx86operand(operands[1]).opsize;
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end;
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2 :
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begin
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case opcode of
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A_MOVZX,A_MOVSX :
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begin
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if tx86operand(operands[1]).opsize=S_NO then
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begin
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tx86operand(operands[1]).opsize:=S_B;
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if (m_delphi in current_settings.modeswitches) then
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Message(asmr_w_unable_to_determine_reference_size_using_byte)
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else
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Message(asmr_e_unable_to_determine_reference_size);
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end;
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case tx86operand(operands[1]).opsize of
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S_W :
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case tx86operand(operands[2]).opsize of
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S_L :
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opsize:=S_WL;
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end;
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S_B :
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begin
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case tx86operand(operands[2]).opsize of
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S_W :
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opsize:=S_BW;
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S_L :
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opsize:=S_BL;
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end;
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end;
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end;
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end;
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A_MOVD : { movd is a move from a mmx register to a
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32 bit register or memory, so no opsize is correct here PM }
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exit;
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A_MOVQ :
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opsize:=S_IQ;
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A_OUT :
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opsize:=tx86operand(operands[1]).opsize;
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else
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opsize:=tx86operand(operands[2]).opsize;
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end;
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end;
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3 :
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opsize:=tx86operand(operands[3]).opsize;
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end;
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end;
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procedure Tx86Instruction.CheckOperandSizes;
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var
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sizeerr : boolean;
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i : longint;
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begin
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{ Check only the most common opcodes here, the others are done in
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the assembler pass }
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case opcode of
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A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
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A_CMP,A_MOV,
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A_ADD,A_SUB,A_ADC,A_SBB,
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A_AND,A_OR,A_TEST,A_XOR: ;
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else
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exit;
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end;
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{ Handle the BW,BL,WL separatly }
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sizeerr:=false;
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{ special push/pop selector case }
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if ((opcode=A_PUSH) or
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(opcode=A_POP)) and
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(operands[1].opr.typ=OPR_REGISTER) and
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is_segment_reg(operands[1].opr.reg) then
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exit;
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if opsize in [S_BW,S_BL,S_WL] then
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begin
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if ops<>2 then
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sizeerr:=true
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else
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begin
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case opsize of
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S_BW :
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sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
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S_BL :
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sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
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S_WL :
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sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
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end;
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end;
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end
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else
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begin
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for i:=1 to ops do
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begin
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if (operands[i].opr.typ<>OPR_CONSTANT) and
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(tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
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(tx86operand(operands[i]).opsize<>opsize) then
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sizeerr:=true;
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end;
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end;
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if sizeerr then
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begin
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{ if range checks are on then generate an error }
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if (cs_compilesystem in current_settings.moduleswitches) or
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not (cs_check_range in current_settings.localswitches) then
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Message(asmr_w_size_suffix_and_dest_dont_match)
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else
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Message(asmr_e_size_suffix_and_dest_dont_match);
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end;
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end;
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{ This check must be done with the operand in ATT order
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i.e.after swapping in the intel reader
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but before swapping in the NASM and TASM writers PM }
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procedure Tx86Instruction.CheckNonCommutativeOpcodes;
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begin
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if (OpOrder=op_intel) then
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SwapOperands;
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if (
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(ops=2) and
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(operands[1].opr.typ=OPR_REGISTER) and
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(operands[2].opr.typ=OPR_REGISTER) and
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{ if the first is ST and the second is also a register
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it is necessarily ST1 .. ST7 }
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((operands[1].opr.reg=NR_ST) or
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(operands[1].opr.reg=NR_ST0))
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) or
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(ops=0) then
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if opcode=A_FSUBR then
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opcode:=A_FSUB
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else if opcode=A_FSUB then
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opcode:=A_FSUBR
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else if opcode=A_FDIVR then
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opcode:=A_FDIV
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else if opcode=A_FDIV then
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opcode:=A_FDIVR
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else if opcode=A_FSUBRP then
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opcode:=A_FSUBP
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else if opcode=A_FSUBP then
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opcode:=A_FSUBRP
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else if opcode=A_FDIVRP then
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opcode:=A_FDIVP
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else if opcode=A_FDIVP then
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opcode:=A_FDIVRP;
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if (
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(ops=1) and
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(operands[1].opr.typ=OPR_REGISTER) and
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(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
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(operands[1].opr.reg<>NR_ST) and
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(operands[1].opr.reg<>NR_ST0)
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) then
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if opcode=A_FSUBRP then
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opcode:=A_FSUBP
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else if opcode=A_FSUBP then
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opcode:=A_FSUBRP
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else if opcode=A_FDIVRP then
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opcode:=A_FDIVP
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else if opcode=A_FDIVP then
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|
opcode:=A_FDIVRP;
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
opcode Adding
|
|
*****************************************************************************}
|
|
|
|
function Tx86Instruction.ConcatInstruction(p : TAsmList) : tai;
|
|
var
|
|
siz : topsize;
|
|
i,asize : longint;
|
|
ai : taicpu;
|
|
begin
|
|
if (OpOrder=op_intel) then
|
|
SwapOperands;
|
|
|
|
ai:=nil;
|
|
for i:=1 to Ops do
|
|
if not operands[i].CheckOperand then
|
|
exit;
|
|
|
|
{ Get Opsize }
|
|
if (opsize<>S_NO) or (Ops=0) then
|
|
siz:=opsize
|
|
else
|
|
begin
|
|
if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
|
|
siz:=tx86operand(operands[1]).opsize
|
|
else
|
|
siz:=tx86operand(operands[Ops]).opsize;
|
|
{ MOVD should be of size S_LQ or S_QL, but these do not exist PM }
|
|
if (ops=2) and
|
|
(tx86operand(operands[1]).opsize<>S_NO) and
|
|
(tx86operand(operands[2]).opsize<>S_NO) and
|
|
(tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
|
|
siz:=S_NO;
|
|
end;
|
|
|
|
if ((opcode=A_MOVD)or
|
|
(opcode=A_CVTSI2SS)) and
|
|
((tx86operand(operands[1]).opsize=S_NO) or
|
|
(tx86operand(operands[2]).opsize=S_NO)) then
|
|
siz:=S_NO;
|
|
{ NASM does not support FADD without args
|
|
as alias of FADDP
|
|
and GNU AS interprets FADD without operand differently
|
|
for version 2.9.1 and 2.9.5 !! }
|
|
if (ops=0) and
|
|
((opcode=A_FADD) or
|
|
(opcode=A_FMUL) or
|
|
(opcode=A_FSUB) or
|
|
(opcode=A_FSUBR) or
|
|
(opcode=A_FDIV) or
|
|
(opcode=A_FDIVR)) then
|
|
begin
|
|
if opcode=A_FADD then
|
|
opcode:=A_FADDP
|
|
else if opcode=A_FMUL then
|
|
opcode:=A_FMULP
|
|
else if opcode=A_FSUB then
|
|
opcode:=A_FSUBP
|
|
else if opcode=A_FSUBR then
|
|
opcode:=A_FSUBRP
|
|
else if opcode=A_FDIV then
|
|
opcode:=A_FDIVP
|
|
else if opcode=A_FDIVR then
|
|
opcode:=A_FDIVRP;
|
|
message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
|
|
end;
|
|
|
|
{It is valid to specify some instructions without operand size.}
|
|
if siz=S_NO then
|
|
begin
|
|
if (ops=1) and (opcode=A_INT) then
|
|
siz:=S_B;
|
|
if (ops=1) and (opcode=A_RET) or (opcode=A_RETN) or (opcode=A_RETF) then
|
|
siz:=S_W;
|
|
if (ops=1) and (opcode=A_PUSH) then
|
|
begin
|
|
{We are a 32 compiler, assume 32-bit by default. This is Delphi
|
|
compatible but bad coding practise.}
|
|
siz:=S_L;
|
|
message(asmr_w_unable_to_determine_reference_size_using_dword);
|
|
end;
|
|
if (opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) then
|
|
if ops=1 then
|
|
siz:=S_NEAR
|
|
else
|
|
siz:=S_FAR;
|
|
end;
|
|
|
|
{$ifdef x86_64}
|
|
{ Convert movq with at least one general registers or constant to a mov instruction }
|
|
if (opcode=A_MOVQ) and
|
|
(ops=2) and
|
|
(
|
|
(operands[1].opr.typ=OPR_REGISTER) or
|
|
(operands[2].opr.typ=OPR_REGISTER) or
|
|
(operands[1].opr.typ=OPR_CONSTANT)
|
|
) then
|
|
opcode:=A_MOV;
|
|
{$endif x86_64}
|
|
|
|
{ GNU AS interprets FDIV without operand differently
|
|
for version 2.9.1 and 2.10
|
|
we add explicit args to it !! }
|
|
if (ops=0) and
|
|
((opcode=A_FSUBP) or
|
|
(opcode=A_FSUBRP) or
|
|
(opcode=A_FDIVP) or
|
|
(opcode=A_FDIVRP) or
|
|
(opcode=A_FSUB) or
|
|
(opcode=A_FSUBR) or
|
|
(opcode=A_FADD) or
|
|
(opcode=A_FADDP) or
|
|
(opcode=A_FDIV) or
|
|
(opcode=A_FDIVR)) then
|
|
begin
|
|
message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
|
|
ops:=2;
|
|
operands[1].opr.typ:=OPR_REGISTER;
|
|
operands[2].opr.typ:=OPR_REGISTER;
|
|
operands[1].opr.reg:=NR_ST0;
|
|
operands[2].opr.reg:=NR_ST1;
|
|
end;
|
|
if (ops=1) and
|
|
(
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
|
|
(operands[1].opr.reg<>NR_ST) and
|
|
(operands[1].opr.reg<>NR_ST0)
|
|
) and
|
|
(
|
|
(opcode=A_FSUBP) or
|
|
(opcode=A_FSUBRP) or
|
|
(opcode=A_FDIVP) or
|
|
(opcode=A_FDIVRP) or
|
|
(opcode=A_FADDP) or
|
|
(opcode=A_FMULP)
|
|
) then
|
|
begin
|
|
message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
|
|
ops:=2;
|
|
operands[2].opr.typ:=OPR_REGISTER;
|
|
operands[2].opr.reg:=operands[1].opr.reg;
|
|
operands[1].opr.reg:=NR_ST0;
|
|
end;
|
|
|
|
if (ops=1) and
|
|
(
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
|
|
(operands[1].opr.reg<>NR_ST) and
|
|
(operands[1].opr.reg<>NR_ST0)
|
|
) and
|
|
(
|
|
(opcode=A_FSUB) or
|
|
(opcode=A_FSUBR) or
|
|
(opcode=A_FDIV) or
|
|
(opcode=A_FDIVR) or
|
|
(opcode=A_FADD) or
|
|
(opcode=A_FMUL)
|
|
) then
|
|
begin
|
|
message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
|
|
ops:=2;
|
|
operands[2].opr.typ:=OPR_REGISTER;
|
|
operands[2].opr.reg:=NR_ST0;
|
|
end;
|
|
|
|
{ I tried to convince Linus Torvalds to add
|
|
code to support ENTER instruction
|
|
(when raising a stack page fault)
|
|
but he replied that ENTER is a bad instruction and
|
|
Linux does not need to support it
|
|
So I think its at least a good idea to add a warning
|
|
if someone uses this in assembler code
|
|
FPC itself does not use it at all PM }
|
|
if (opcode=A_ENTER) and
|
|
(target_info.system in [system_i386_linux,system_i386_FreeBSD]) then
|
|
Message(asmr_w_enter_not_supported_by_linux);
|
|
|
|
ai:=taicpu.op_none(opcode,siz);
|
|
ai.SetOperandOrder(OpOrder);
|
|
ai.Ops:=Ops;
|
|
ai.Allocate_oper(Ops);
|
|
for i:=1 to Ops do
|
|
case operands[i].opr.typ of
|
|
OPR_CONSTANT :
|
|
ai.loadconst(i-1,operands[i].opr.val);
|
|
OPR_REGISTER:
|
|
ai.loadreg(i-1,operands[i].opr.reg);
|
|
OPR_SYMBOL:
|
|
ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
|
|
OPR_LOCAL :
|
|
with operands[i].opr do
|
|
ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
|
|
localscale,localgetoffset,localforceref);
|
|
OPR_REFERENCE:
|
|
begin
|
|
ai.loadref(i-1,operands[i].opr.ref);
|
|
if operands[i].size<>OS_NO then
|
|
begin
|
|
asize:=0;
|
|
case operands[i].size of
|
|
OS_8,OS_S8 :
|
|
asize:=OT_BITS8;
|
|
OS_16,OS_S16 :
|
|
asize:=OT_BITS16;
|
|
OS_32,OS_S32,OS_F32 :
|
|
asize:=OT_BITS32;
|
|
OS_64,OS_S64:
|
|
begin
|
|
{ Only FPU operations know about 64bit values, for all
|
|
integer operations it is seen as 32bit }
|
|
if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
|
|
asize:=OT_BITS64
|
|
else
|
|
asize:=OT_BITS32;
|
|
end;
|
|
OS_F64,OS_C64 :
|
|
asize:=OT_BITS64;
|
|
OS_F80 :
|
|
asize:=OT_BITS80;
|
|
end;
|
|
if asize<>0 then
|
|
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
{ Condition ? }
|
|
if condition<>C_None then
|
|
ai.SetCondition(condition);
|
|
|
|
{ Concat the opcode or give an error }
|
|
if assigned(ai) then
|
|
p.concat(ai)
|
|
else
|
|
Message(asmr_e_invalid_opcode_and_operand);
|
|
result:=ai;
|
|
end;
|
|
|
|
end.
|