nickysn 3c96090d3c + optimized avr code generation for shr by shiftcount=size*8-1 and sar by ... shiftcount>=size*8-1. This is commonly used by code, that extracts the sign bit and improves code generation for signed division by power-of-2 as well. This also fixes building avr-embedded (mantis #32241), which was caused by an infinite loop in the register allocator, when regvars are enabled, due to too much register pressure, when building charset.pp after r36842. git-svn-id: trunk@36867 -		2017-08-09 15:53:06 +00:00
..
aasmcpu.pas	* convert jmp into rjmp only of the target is not a function	2016-11-20 18:00:01 +00:00
agavrgas.pas	* restructured the the TExternalAssembler constructors so that the	2016-11-09 19:51:20 +00:00
aoptcpu.pas	* unified usage of MatchOpType	2017-05-07 16:18:33 +00:00
aoptcpub.pas
aoptcpud.pas
avrreg.dat	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
cgcpu.pas	+ optimized avr code generation for shr by shiftcount=size*8-1 and sar by	2017-08-09 15:53:06 +00:00
cpubase.pas	+ added F_PL and F_MI to TResFlags for avr. This allows generating the BRPL and	2017-08-09 15:14:33 +00:00
cpuinfo.pas	- removed unused constants	2017-03-26 13:06:34 +00:00
cpunode.pas	+ tavraddrnode.pass_generate_code, avoiding unneeded moves	2016-11-26 19:31:33 +00:00
cpupara.pas	* support marking defs created via the getreusable*() class methods as	2015-11-04 20:46:18 +00:00
cpupi.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cputarg.pas
hlcgcpu.pas
itcpugas.pas	+ xch instruction for avr	2016-11-19 19:21:09 +00:00
navradd.pas	* Delete regvars unit.	2016-11-06 14:01:39 +00:00
navrcnv.pas
navrmat.pas	* use handle_locjump() instead of local inlined version	2015-08-27 18:28:52 +00:00
navrmem.pas	* use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler)	2017-07-28 15:54:03 +00:00
navrutil.pas	* rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR	2017-05-23 19:58:39 +00:00
raavr.pas
raavrgas.pas	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrcon.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrdwa.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrnor.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrnum.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrrni.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrsri.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrsta.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrstd.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
ravrsup.inc	* keep the names of X, Y and Z in assembler files, fixes issue #32150	2017-07-23 19:24:45 +00:00
rgcpu.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
symcpu.pas